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tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 revision: v1.30 date: ? a ??? ?? ? 013 ? a ??? ?? ? 013
rev. 1.30 ? ? a ??? ?? ? 013 rev. 1.30 3 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu table of contents eates eneal eston seleton table lo aam n ssnment n eston bsolte amm atns c caatests c caatests c caatests oeon eset caatests sstem tete clo ? king and pipelining ......................................................................................................... ? 1 p ? og ? am counte ? ................................................................................................................... ?? sta ? k ..................................................................................................................................... ? 3 arithmetic and logic unit ? alu ........................................................................................... ? 4 p?og?am ?emo?y ........................................................................................... ?5 st ? u ? tu ? e ................................................................................................................................ ? 5 spe ? ial ve ? to ? s ..................................................................................................................... ?? look-up table ............. ........................................................................................................... ? 7 table p ? og ? am example ........................................................................................................ ? 8 data ?emo?y .................................................................................................. ?9 st ? u ? tu ? e ................................................................................................................................ ? 9 gene ? al pu ? pose data ? emo ? y ............................................................................................ ? 9 spe ? ial pu ? pose data ? emo ? y ............................................................................................. 30 display ? emo ? y .................................................................................................................... 3 ? spe?ial fun?tion registe?s ........... ................................................................ 3? indirect addressing registers ? iar0, iar1 ......................................................................... 3 ? memory pointers ? mp0, mp1 .............................................................................................. 33 bank pointer ? bp ............. .................................................................................................... 34 accumulator ? acc ............................................................................................................... 34 program counter low register ? pcl .................................................................................. 34 look-up table registers ? tblp, tblh ................................................................................ 35 status register ? status .................................................................................................... 35 inte ?? upt cont ? ol registe ? s .................................................................................................... 3 ? time ? /event counte ? registe ? s ............................................................................................. 3 ? input/output po ? ts and cont ? ol registe ? s ............. ................................................................ 3 ? pulse widt ? ? odulato ? registe ? s .......................................................................................... 3 ? a/d converter registers C adrl, adrh, adcr, acsr ...................................................... 3 ?
rev. 1.30 ? ?a??? ?? ?013 rev. 1.30 3 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu se ? ial inte ? fa ? e registe ? s ...................................................................................................... 37 port a wake-up register ? pawu ........................................................................................ 37 pull-high resistors ? papu, pbpu, pdpu .......................................................................... 37 register ? clkmod ............................................................................................................. 37 lcd/led registe ? s C lcdctrl ? ledctrl ? lcdout1 ? lcdout ? .................................. 37 miscellaneous register ? misc ............. ............................................................................... 37 input/output ports ......................................................................................... 38 pull- ? ig ? resisto ? s ................................................................................................................ 38 po ? t a wake-up ............. ........................................................................................................ 38 po ? t a open d ? ain fun ? tion .................................................................................................. 38 i/o po ? t cont ? ol registe ? s ..................................................................................................... 39 pin-s ? a ? ed fun ? tions ............. ............................................................................................... 39 i/o pin st ? u ? tu ? es .................................................................................................................. 40 p ? og ? amming conside ? ations ............. ................................................................................... 41 lcd and led driver .......... ............................................................................ 42 display ? emo ? y .................................................................................................................... 45 lcd/led registe ? s ............................................................................................................... 4 ? lcd reset fun ? tion .............................................................................................................. 49 clo ? k sou ?? e ......................................................................................................................... 49 lcd d ? ive ? output ................................................................................................................. 49 led d ? ive ? output ................................................................................................................. 50 lcd voltage sou ?? e and biasing .......................................................................................... 50 p ? og ? amming conside ? ations ............. ................................................................................... 51 timer/event counters ................................................................................... 58 confguring the timer/event counter input clock source .................................................... 58 timer registers ? tmr0, tmr1, tmr1l/tmr1h, tmr2 ..................................................... 59 timer control registers ? tmr0c, tmr1c, tmr2c ........................................................... ? 0 confguring the timer mode .................................................................................................. ?? confguring the event counter mode .................................................................................... ? 3 confguring the pulse width measurement mode ................................................................. ? 4 programmable frequency divider ? pfd ............................................................................. ? 5 p ? es ? ale ? ............................................................................................................................... ? 5 i/o inte ? fa ? ing ........................................................................................................................ ? 5 time ? /event counte ? pins inte ? nal filte ? ............................................................................... ?? p ? og ? amming conside ? ations ............. ................................................................................... ?? time ? p ? og ? am example ....................................................................................................... ? 7 pulse width modulator .................................................................................. 68 pw ? ove ? view ..................................................................................................................... ? 8 8+4 pw ? ? ode ? odulation .................................................................................................. ? 9 pw ? output cont ? ol ............................................................................................................. ? 9 pw ? p ? og ? amming example ................................................................................................ 70
rev. 1.30 4 ? a ??? ?? ? 013 rev. 1.30 5 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu analog to digital converter .......... ................................................................ 71 a/d ove ? view ............. ........................................................................................................... 71 a/d converter data registers ? adrl, adrh ..................................................................... 71 a/d converter control registers ? adcr, acsr ............. .................................................... 7 ? a/d input pins ............. .......................................................................................................... 74 initialising t ? e a/d conve ? te ? ................................................................................................. 74 summa ? y of a/d conve ? sion steps ............. .......................................................................... 75 p ? og ? amming conside ? ations ............. ................................................................................... 7 ? a/d p ? og ? amming example ................................................................................................... 77 a/d t ? ansfe ? fun ? tion ............. .............................................................................................. 79 serial interface function ............................................................................... 80 spi inte ? fa ? e ......................................................................................................................... 80 spi registe ? s ............. ........................................................................................................... 8 ? spi control register ? simctl2 .......................................................................................... 83 spi communi ? ation .............................................................................................................. 85 i ? c inte ? fa ? e ............ .............................................................................................................. 88 i ? c control register ? simar ............................................................................................... 90 i ? c bus communi ? ation ........................................................................................................ 91 peripheral clock output ........... ..................................................................... 95 pe ? ip ? e ? al clo ? k ope ? ation ............. ...................................................................................... 95 buzzer ............................................................................................................. 96 interrupts ........................................................................................................ 98 inte ?? upt registe ? s ................................................................................................................. 98 inte ?? upt ope ? ation .............................................................................................................. 100 inte ?? upt p ? io ? ity ................................................................................................................... 10 ? exte ? nal inte ?? upt ............. .................................................................................................... 10 ? exte ? nal pe ? ip ? e ? al inte ?? upt ............. .................................................................................. 103 time ? /event counte ? inte ?? upt ............................................................................................. 104 a/d inte ?? upt ........................................................................................................................ 104 spi/i ? c inte ? fa ? e inte ?? upt ................................................................................................... 104 ? ulti-fun ? tion inte ?? upt ........................................................................................................ 105 real time clo ? k inte ?? upt .................................................................................................... 105 time base inte ?? upt ............................................................................................................. 10 ? p ? og ? amming conside ? ations ............. ................................................................................. 107 reset and initialisation ................................................................................ 107 reset fun ? tions ............. ..................................................................................................... 108 reset initial conditions ........................................................................................................ 110 oscillator ....................................................................................................... 113 system clock confgurations ............................................................................................... 113 system c ? ystal/ce ? ami ? os ? illato ? ............. .......................................................................... 113 exte ? nal system rc os ? illato ? ............................................................................................. 114 internal 32k_int oscillator ............. ..................................................................................... 115 external 32768hz oscillator ............. .................................................................................... 115 exte ? nal os ? illa to ? ................................................................................................................ 11 ?
rev. 1.30 4 ?a??? ?? ?013 rev. 1.30 5 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu system operating modes ........... .................................................................. 116 clo ? k sou ?? es ...................................................................................................................... 11 ? ope ? ating ? odes .................................................................................................................. 118 power down mode and wake-up ................................................................ 121 powe ? down ? ode .............................................................................................................. 1 ? 1 ente ? ing t ? e powe ? down ? ode ......................................................................................... 1 ? 1 standby cu ?? ent conside ? ations ......................................................................................... 1 ? 1 wake-up .............................................................................................................................. 1 ?? low voltage detector ? lvd ....................................................................... 123 lvd ope ? ation ..................................................................................................................... 1 ? 3 watchdog timer ........... ................................................................................ 124 wat ?? dog time ? ope ? ation ................................................................................................. 1 ? 4 clea ? ing t ? e wat ?? dog time ? .............................................................................................. 1 ? 5 confguration options ................................................................................. 126 application circuits ........... .......................................................................... 127 instruction set .............................................................................................. 129 int ? odu ? tion ......................................................................................................................... 1 ? 9 inst ? u ? tion timing ................................................................................................................ 1 ? 9 ? oving and t ? ansfe ?? ing data ............................................................................................. 1 ? 9 a ? it ? meti ? ope ? ations .......................................................................................................... 1 ? 9 logi ? al and rotate ope ? ation ............................................................................................. 130 b ? an ?? es and cont ? ol t ? ansfe ? ........................................................................................... 130 bit ope ? ations ..................................................................................................................... 130 table read ope ? ations ....................................................................................................... 130 ot ? e ? ope ? ations ............. .................................................................................................... 130 instruction set summary .......... .................................................................. 131 table conventions ............................................................................................................... 131 instruction defnition ................................................................................... 133 package information ................................................................................... 142 5 ? -pin qfp (14mm14mm) outline dimensions ................................................................ 14 ? ? 4-pin lqfp (7mm7mm) outline dimensions .................................................................. 143 100-pin lqfp (14mm14mm) outline dimensions ............................................................ 144
rev. 1.30 ? ? a ??? ?? ? 013 rev. 1.30 7 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu features ? operating voltage: f sys =32768hz: 2.2v~5.5v f sys =4mhz: 2.2v~5.5v f sys =8mhz: 3.0v~5.5v f sys =12mhz: 4.5v~5.5v ? operating current: f sys =1mhz at 3v, 170a, typ. f sys =32khz at 3v, 6a, typ. ? otp program memory: 2k14~8k16 ? ram data memory: 1288~11528 ? 20 to 24 bidirectional i/o lines ? tinypower technology for low power operation ? three pin-shared external interrupts lines ? multiple programmable t imer/event counters with overfow interrupt and 7-stage prescaler ? external crystal, rc and 32768 xtal oscillators ? fully integrated rc 32khz oscillator ? externally supplied system clock option ? watchdog t imer function ? pfd/buzzer for audio frequency generation ? dual serial interfaces: spi and i 2 c ? lcd and led driver function ? 4 operating modes: normal, slow, idle and sleep ? 6 or 8-channel 12-bit resolution a/d converter ? 3 or 4-channel 12-bit pwm outputs ? low voltage reset function: 2.1v, 3.15v, 4.2v ? low voltage detect function: 2.2v, 3.3v, 4.4v ? bit manipulation instruction ? table read instructions ? 63 powerful instructions ? up to 0.33s instruction cycle with 12mhz system clock at v dd =5v ? multiple level subroutine nesting ? all instructions executed in one or two machine cycles ? power down and wake-up functions to reduce power consumption ? wide range of available package types
rev. 1.30 ? ?a??? ?? ?013 rev. 1.30 7 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu general description these t inypower tm a/d t ype with lcd 8-bit high performance risc architecture microc ontrollers are specifcally , designed for applic ations that interface directly to analog signals and which require an lcd or led interface. the devices include an integrated multi-channel analog to digital converter, pulse w idth modulation outputs and an lcd/led driver. with their fully integrated sp i and i 2 c functions, des igners are provided with a means of easy communication wi th e xternal p eripheral h ardware. t he b enefits o f i ntegrated a/ d, l cd, a nd pwm functions, in addition to low power consumption, high performance, i/o flexibility and low-cost, provides the device with the versatility for a wide range of products in the home appliance and industrial application areas. some of these products could include electronic metering, environmental monitoring, handheld instruments, electronically controlled tools, motor driving in addition to many others. the unique holtek t inypower techn ology also gives the devices extremely low current consumption characteristics, an extremely important consideration in the present trend for low power battery powered applicati ons. the usual holtek mcu features such as power down and wake-up functions, oscillator options, programmable frequency divider , etc. combine to ensure user applications require a minimum of external components. selection table most features are common to all devices, the main feature distinguishing them are program memory capacity, i/o count, stack capacity and package types. the following table summarises the main features of each device. part no. v dd program memory data memory i/o lcd timer a/d pwm stack package types 8-bit 16-bit +75 ? . ? v~5.5v . 1 ? 88 ? 0 ? 44 o ? ? 53 ? 1 ? -bit ? 1 ? -bit3 ? 5 ? qfp ? ? 4lqfp +75 ? . ? v~5.5v . 57 ? 8 ? 4 404 o ? 413 ? 1 1 ? -bit8 1 ? -bit4 1 ? 5 ? qfp ? ? 4lqfp ? 100lqfp +75 ? . ? v~5.5v . 3848 ? 4 1 ? 1 ? o ? ? 48 1 1 1 ? -bit8 1 ? -bit4 8 ? 4lqfp +75 ? . ? v~5.5v . 57 ? 8 ? 4 3 ? 1 ? o ? 408 1 1 1 ? -bit8 1 ? -bit4 8 100lqfp +75 . 115 ? 8 ? 1 ? +75 ? . ? v~5.5v . 115 ? 8 ? 4 481 ? o ? 5 ? 8 ? 1 1 ? -bit8 1 ? -bit4 1 ? 100lqfp note: 1. the devices are only available in otp versions. 2. for devices that exist in more than one package formats, the table refects the situation for the lar ger package.
rev. 1.30 8 ? a ??? ?? ? 013 rev. 1.30 9 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu block diagram

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rev. 1.30 8 ?a??? ?? ?013 rev. 1.30 9 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu pin assignment

rev. 1.30 10 ? a ??? ?? ? 013 rev. 1.30 11 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu

rev. 1.30 10 ?a??? ?? ?013 rev. 1.30 11 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu pin description the following table depicts the pins common to all devices. pin name i/o &rqjxudwlrq option description pa0/bz pa1/ bz pa ? pa3/pfd pa4 o ? pa4/t ? r1 o ? pa4/t ? r ? pa5~pa7 i/o bz/bz pfd bidi ? e ? tional 8-bit input/output po ? t. ea ?? individual bit on t ? is po ? t ? an be frqjxugdvdzdxslqsxwxvlqjw3:8ujlvwu?riwzdulqvwuxfwlrqv dete ? mine if t ? e pin is a c ? os output o ? s ?? mitt t ? igge ? input. a pull- ? ig ? ? esisto ? ? an be ? onne ? ted to ea ?? pin using t ? e papu ? egiste ? . pins pa0 ? pa1 and pa3 a ? e s ? a ? ed wit ? bz ? bz and pfd ? espe ? tively ? t ? e fun ? tion of w ? i ?? lvfrvqyldfrqjxudwlrqrswlrq3lqv3a3fdqdovrevwxsdvrsq gudlqslqvxvlqjw0??ujlvwu7+75dvqrvdugslqvzlw 33lq3lvvdugzlw705rqw+75dqgzlw705rqw +75+75+75dqg+75 31a 31 o ? 31a 31 i/o bidi ? e ? tional 8-bit input/output po ? t. softwa ? e inst ? u ? tions dete ? mine if t ? e pin is a c ? os output o ? s ?? mitt t ? igge ? input. a pull- ? ig ? ? esisto ? ? an be ? onne ? ted to ea ?? pin using t ? e pbpu ? egiste ? . pb is pin-s ? a ? ed wit ? t ? e a/d input pins. t ? e a/d inputs a ? e sele ? ted via softwa ? e inst ? u ? tions. on ? e sele ? ted as an a/d input ? t ? e i/o fun ? tion and pull- ? ig ? ? esisto ? sele ? tions a ? e glvdeogdxwrpdwlfdoo+75dvvl[3slqv31a31rqo pd0/pw ? 0~ pd3/pw ? 3 3?17 3?17 pd ? /t ? r0 pd7/t ? r1 i/o bidi ? e ? tional 8-bit input/output po ? t. softwa ? e inst ? u ? tions dete ? mine if t ? e pin is a c ? os output o ? s ?? mitt t ? igge ? input. a pull- ? ig ? ? esisto ? ? an be ? onne ? ted to ea ?? pin using t ? e pdpu ? egiste ? . t ? e pw ? outputs ? pw ? 0~pw ? 3 ? a ? e pin s ? a ? ed wit ? pins pd0~pd3 ? t ? e fun ? tion of w ? i ?? is frvqxvlqjw3:0ujlvwuv3lqv3a3duslqvdugzlw?17 ?17705dqg705uvsfwlyo+75dvwu3:0slqvdqg3 is not available. osc1 osc ? i o c ? ystal o ? rc o ? ec osc1 ? osc ? a ? e ? onne ? ted to an exte ? nal rc netwo ? k o ? exte ? nal ?? ystal ? gwuplqgefrqjxudwlrqrswlrqiruwlqwuqdovvwpforf?iw5 system ? lo ? k option is sele ? ted ? pin osc ? ? an be used to measu ? e t ? e system ? lo ? k at 1/4 f ? equen ? y. ec is exte ? nal ? lo ? k mode ? we ? an ? onne ? t osc1 pin wit ? exte ? nal ? lo ? k sou ?? e di ? e ? tly. osc3 osc4 i o +] ??dqg??dufrqqfwgwrd+]fuvwdorvfloodwruwrirupd ? eal time ? lo ? k fo ? timing pu ? poses and fo ? f sub o ? f sl 7lv+]fuvwdolv glvdeogqdeogefrqjxudwlrqrswlrq vref i a/d ? efe ? en ? e voltage input pin res i s ?? mitt t ? igge ? ? eset input. a ? tive low vdd positive powe ? supply vss 1jdwlysrzuvxssojurxqg avdd analog positive powe ? supply avss analog negative powe ? supply ? g ? ound
rev. 1.30 1 ? ? a ??? ?? ? 013 rev. 1.30 13 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu the following tables depict the device dependent pins. pin name i/o &rqjxudwlrq option description HT56R62 v ? ax i ic maximum voltage ? ? onne ? t to vdd ? vlcd1 o ? v1 vlcd1/vlcd ? /v1 ? c1 ? c ? lcd voltage pump pins fo ? c-type biasing. fo ? r-type biasing only pin vlcd1 a ? e used. seg0~seg4 seg5/sdo seg ? /sdi/sda ?(*?.?/ seg8/scs ?(*3/. seg10/3?17 seg11~seg ? 3 o o i/o i/o i/o o i/o o si ? 3?17 seg0~seg ? 3 a ? e lcd d ? ive ? outputs fo ? lcd panel segments. seg5 is pin-s ? a ? ed wit ? t ? e spi bus data output line ? sdo. seg ? is pin-s ? a ? ed wit ? t ? e spi bus data input line ? sdi and t ? e i ? c bus data line sda. ?(*lvslqvdugzlww?3?exvforfolq?.dqgw? ? c bus ? lo ? k line scl. seg8 is pin-s ? a ? ed wit ? t ? e spi bus sele ? t line ? scs. ?(*lvslqvdugzlww3ulsudoorfolq3/. seg10 is pin-s ? a ? ed wit ? t ? e pe ? ip ? e ? al inte ?? upt line ? 3?17 . t ? e seg0~seg15 lines ? an be ? an be ?? osen to be eit ? e ? segment d ? ive ? s o ? c ? os outputs using ? ont ? ol bits in t ? e lcd ? ont ? ol ? egiste ? s. co ? 0~co ?? co ? 3/seg ? 4 o co ? 0~co ?? a ? e t ? e lcd ? ommon outputs. a bit in t ? e lcd cont ? ol registe ? dete ? mines if pin co ? 3/seg ? 4 is ? onfigu ? ed as a segment d ? ive ? o ? as a ? ommon output d ? ive ? . ht56r65 v ? ax i ic maximum voltage ? ? onne ? t to vdd ? vlcd1 o ? v1 vlcd1/vlcd ? /v1 ? c1 ? c ? lcd voltage pump pins fo ? c-type biasing. fo ? r-type biasing only pin vlcd1 a ? e used. seg0~seg15 seg1 ? /sdo seg17/sdi/sda ?(*?.?/ seg19/scs ?(*3/. seg ? 1/ 3?17 seg ?? ~seg39 o o i/o i/o i/o o i/o o si ? 3?17 seg0~seg39 a ? e lcd d ? ive ? outputs fo ? lcd panel segments. seg1 ? is pin-s ? a ? ed wit ? t ? e spi bus data output line ? sdo. seg17 is pin-s ? a ? ed wit ? t ? e spi bus data input line ? sdi and t ? e i ? c bus data line sda. ?(*lvslqvdugzlww?3?exvforfolq?.dqgw? ? c bus ? lo ? k line scl. seg19 is pin-s ? a ? ed wit ? t ? e spi bus sele ? t line ? scs. ?(*lvslqvdugzlww3ulsudoorfolq3/. seg ? 1 is pin-s ? a ? ed wit ? t ? e pe ? ip ? e ? al inte ?? upt line ? 3?17 . t ? e seg0~seg ? 3 lines ? an be ? an be ?? osen to be eit ? e ? segment d ? ive ? s o ? c ? os outputs using ? ont ? ol bits in t ? e lcd ? ont ? ol ? egiste ? s. co ? 0~co ?? co ? 3/seg40 o co ? 0~co ?? a ? e t ? e lcd ? ommon outputs. a bit in t ? e lcd cont ? ol registe ? dete ? mines if pin co ? 3/seg40 is ? onfigu ? ed as a segment d ? ive ? o ? as a ? ommon output d ? ive ? . ht56r642 vlcd i /eldvslqpxvwovvwdqrutxdowr9 seg0~seg9 seg10/sdo seg11/sdi/sda ?(*?.?/ seg13/scs ?(*3/. seg15/3?17 co ? 15/seg1 ? ~ co ? 8/seg ? 3 o o i/o i/o i/o o i/o o si ? 3?17 seg0~seg15 a ? e lcd d ? ive ? outputs fo ? lcd panel segments. seg10 is pin-s ? a ? ed wit ? t ? e spi bus data output line ? sdo. seg11 is pin-s ? a ? ed wit ? t ? e spi bus data input line ? sdi and t ? e i ? c bus data line sda. ?(*lvslqvdugzlww?3?exvforfolq?.dqgw? ? c bus ? lo ? k line scl. seg13 is pin-s ? a ? ed wit ? t ? e spi bus sele ? t line ? scs. ?(*lvslqvdugzlww3ulsudoorfolq3/. seg15 is pin-s ? a ? ed wit ? t ? e pe ? ip ? e ? al inte ?? upt line ? 3?17 . t ? e seg0~seg15 lines ? an be ? an be ?? osen to be eit ? e ? segment d ? ive ? s o ? c ? os outputs using ? ont ? ol bits in t ? e lcd ? ont ? ol ? egiste ? s. co ? 0~co ? 7 o co ? 0~co ? 7 a ? e t ? e lcd ? ommon outputs.
rev. 1.30 1? ?a??? ?? ?013 rev. 1.30 13 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu pin name i/o confguration option description ht56r644/ht56r654 vlcd i /eldvslqpxvwovvwdqrutxdowr9 seg0/sdo seg1/sdi/sda ?(*?.?/ seg3/scs ?(*3/. seg5/3?17 seg ? ~seg31 co ? 15/seg3 ? ~ co ? 8/seg39 o i/o i/o i/o o i/o o o si ? 3?17 seg0~seg31 a ? e lcd d ? ive ? outputs fo ? lcd panel segments. seg0 is pin-s ? a ? ed wit ? t ? e spi bus data output line ? sdo. seg1 is pin-s ? a ? ed wit ? t ? e spi bus data input line ? sdi and t ? e i ? c bus data line sda. ?(*lvslqvdugzlww?3?exvforfolq?.dqgw? ? c bus ? lo ? k line scl. seg3 is pin-s ? a ? ed wit ? t ? e spi bus sele ? t line ? scs. ?(*lvslqvdugzlww3ulsudoorfolq3/. seg5 is pin-s ? a ? ed wit ? t ? e pe ? ip ? e ? al inte ?? upt line ? 3?17 . t ? e seg0~seg ? 3 lines ? an be ? an be ?? osen to be eit ? e ? segment d ? ive ? s o ? c ? os outputs using ? ont ? ol bits in t ? e lcd ? ont ? ol ? egiste ? s. co ? 0~co ? 7 o co ? 0~co ?? a ? e t ? e lcd ? ommon outputs. ht56r656 vlcd i /eldvslqpxvwovvwdqrutxdowr9 seg0/sdo seg1/sdi/sda ?(*?.?/ seg3/scs ?(*3/. seg5/3?17 seg ? ~seg47 co ? 15/seg48~ co ? 8/seg55 o i/o i/o i/o o i/o o o si ? 3?17 seg0~seg47 a ? e lcd d ? ive ? outputs fo ? lcd panel segments. seg0 is pin-s ? a ? ed wit ? t ? e spi bus data output line ? sdo. seg1 is pin-s ? a ? ed wit ? t ? e spi bus data input line ? sdi and t ? e i ? c bus data line sda. ?(*lvslqvdugzlww?3?exvforfolq?.dqgw? ? c bus ? lo ? k line scl. seg3 is pin-s ? a ? ed wit ? t ? e spi bus sele ? t line ? scs. ?(*lvslqvdugzlww3ulsudoorfolq3/. seg5 is pin-s ? a ? ed wit ? t ? e pe ? ip ? e ? al inte ?? upt line ? 3?17 . t ? e seg0~seg ? 3 lines ? an be ? an be ?? osen to be eit ? e ? segment d ? ive ? s o ? c ? os outputs using ? ont ? ol bits in t ? e lcd ? ont ? ol ? egiste ? s. co ? 0~co ? 7 o co ? 0~co ? 7 a ? e t ? e lcd ? ommon outputs. 1rw 7 3lq vfulswlrq wdeov usuvqwv w odu jvw sdfdj ws dydlodeo wuiru vrp ri w slqv dqg ixqfwlrqv pd qrw e dydlodeo rq vpdoou sdfdj wsv absolute maximum ratings 6xsso 9 rowdjh 9 ss ss sw rowh ss 6wrh hpshwh 2shw hpshwh 2 rwo p oh rwo p rwo 3rh swr p 1rwh hh h wh w ro 6whh hfhh wh h shfh h rowh pp w p fh wwo ph wr wh hyfh fwro rshwr r w hyfh w rwh frwr hr wr h owh wh shffwr rw psoh srorh hsrh wr hwhph frwr p hfw hyfh hoow
rev. 1.30 14 ? a ??? ?? ? 013 rev. 1.30 15 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu d.c. characteristics HT56R62/ht56r65 ta= ? 5c symbol parameter test conditions min. typ. max. unit v dd conditions v dd ope ? ating voltage f sys =4mhz ? . ? 5.5 v f sys =8mhz 3.0 5.5 v f sys =12mhz 4.5 5.5 v av dd analog ope ? ating voltage v ref =av dd 3.0 5.0 v i dd1 ope ? ating cu ?? ent (c ? ystal osc ? rc osc) 3v no load, f sys =f ? =1mhz 170 ? 50 a 5v 380 570 a i dd ? ope ? ating cu ?? ent (c ? ystal osc ? rc osc) 3v no load, f sys =f ? =2mhz ? 40 3 ? 0 a 5v 490 730 a i dd3 ope ? ating cu ?? ent (c ? ystal osc ? rc osc) 3v no load, f sys =f ? =4mhz (note 5) 440 ?? 0 a 5v 900 1350 a i dd4 ope ? ating cu ?? ent (ec ? ode ? filte ? on) 3v no load, f sys =f ? =4mhz 380 570 a 5v 7 ? 0 1080 a i dd5 ope ? ating cu ?? ent (ec ? ode ? filte ? off) 3v no load, f sys =f ? =4mhz 370 550 a 5v ? 80 10 ? 0 a i dd ? ope ? ating cu ?? ent (c ? ystal osc ? rc osc) 5v no load, f sys =f ? =8mhz 1.8 ? .7 ma i dd7 ope ? ating cu ?? ent (c ? ystal osc ? rc osc) 5v no load, f sys =f ? =12mhz ? . ? 4.0 ma i dd8 ope ? ating cu ?? ent (slow ? ode ? f ? =4mhz) (c ? ystal osc ? rc osc) 3v no load, f sys =f slow =500khz 150 ?? 0 a 5v 340 510 a i dd9 ope ? ating cu ?? ent (slow ? ode ? f ? =4mhz) (c ? ystal osc ? rc osc) 3v no load, f sys =f slow =1mhz 180 ? 70 a 5v 400 ? 00 a i dd10 ope ? ating cu ?? ent (slow ? ode ? f ? =4mhz) (c ? ystal osc ? rc osc) 3v no load, f sys =f slow =2mhz ? 70 400 a 5v 5 ? 0 840 a i dd11 ope ? ating cu ?? ent (slow ? ode ? f ? =8mhz) (c ? ystal osc ? rc osc) 3v no load, f sys =f slow =1mhz ? 40 3 ? 0 a 5v 540 810 a i dd1 ? ope ? ating cu ?? ent (slow ? ode ? f ? =8mhz) (c ? ystal osc ? rc osc) 3v no load, f sys =f slow =2mhz 3 ? 0 480 a 5v ? 80 10 ? 0 a i dd13 ope ? ating cu ?? ent (slow ? ode ? f ? =8mhz) (c ? ystal osc ? rc osc) 3v no load, f sys =f slow =4mhz 500 750 a 5v 1000 1500 a i dd14 ope ? ating cu ?? ent (f sys =32768hz (note 1) or 32k_int internal rc osc) 3v no load, wdt off, lcd on (note ? ) ? r type ? v lcd1 =v dd ? 1/ ? bias (r bias =400k?) 1 ? 18 a 5v ? 0 30 a i dd15 ope ? ating cu ?? ent (f sys =32768hz (note 1) or 32k_int internal rc osc) 3v no load, wdt off, lcd on (note ? ) ? r type ? v lcd1 =v dd ? 1/3 bias (r bias =600k?) 10 15 a 5v 18 ? 7 a i dd1 ? ope ? ating cu ?? ent (f sys =32768hz (note 1) or 32k_int internal rc osc) 3v no load, wdt off, lcd on (note ? ) ? c type ? 1/3 bias ? v lcd1 =3v 8 1 ? a 5v 1 ? 18 a
rev. 1.30 14 ?a??? ?? ?013 rev. 1.30 15 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu symbol parameter test conditions min. typ. max. unit v dd conditions i dd17 ope ? ating cu ?? ent (f sys =32768hz (note 1) or 32k_int internal rc osc) 3v no load, wdt off, lcd on (note ? ) ? c type ? 1/ ? bias ? v lcd1 =3v 8 1 ? a 5v 1 ? 18 a i dd18 ope ? ating cu ?? ent (f sys =32768hz (note 1) or 32k_int internal rc osc) 3v no load, lcd off, wdt off ? 9 a 5v 10 15 a i stb1 standby cu ?? ent (sleep) (f sys ? f sub ? f s ? f lcd ? f wdt =off) 3v no load, system halt, wdt off 0. ? 1.0 a 5v 0.3 ? .0 a i stb ? standby cu ?? ent (sleep) (f sys ? f lcd ? f wdt =f sub =32768hz (note 1) or 32k_int rc osc) 3v no load, system halt, wdt on 1 ? a 5v 3 5 a i stb3 standby cu ?? ent (idle) (f sys ? f wdt =off; f s (note 3) =f sub =32768hz (note 1) or 32k_int rc osc) 3v no load, system halt, wdt off ? lcd on (note ? ) ? 1/ ? bias ? c type ? v lcd1 =v dd 1 ? a 5v 3 5 a i stb4 standby cu ?? ent (idle) (f sys ? f wdt =off; f s (note 3) =f sub =32768hz (note 1) or 32k_int rc osc) 3v no load, system halt, wdt off ? lcd on (note ? ) ? 1/3 bias ? c type ? v lcd1 =3v 1 ? a 5v 3 5 a i stb5 standby cu ?? ent (idle) (f sys ? f wdt =off; f s (note 3) =f sub =32768hz (note 1) or 32k_int rc osc) 3v no load, system halt, wdt off ? lcd on (note ? ) ? r type ? v lcd1 =v dd ? 1/ ? bias (r bias =400k?) 10 15 a 5v 18 ? 7 a i stb ? standby cu ?? ent (idle) (f sys ? f wdt =off; f s (note 3) =f sub =32768hz (note 1) or 32k_int rc osc) 3v no load, system halt, wdt off ? lcd on (note ? ) ? r type ? v lcd1 =v dd ? 1/3 bias (r bias =600k?) 10 15 a 5v 1 ? ? 4 a i stb7 standby cu ?? ent (idle) (f sys =on ? f sys =f ? =4mhz, f wdt ? f lcd =off ? f s (note 3) =f sub =32768hz (note 1) or 32k_int rc osc) 3v no load, system halt, wdt off ? lcd off ? spi o ? i ? c on, pclk on, pclk=f sys /8 150 ? 50 a 5v 350 550 a v il1 input low voltage fo ? i/o po ? ts ? tmr and int 0 0.3v dd v v ih1 input high voltage for i/o ports, tmr and int 0.7v dd v dd v v il ? input low voltage ( res) 0 0.4v dd v v ih2 input high voltage ( res) 0.9v dd v dd v v lvr low voltage reset voltage confguration option: 2.1v 1.98 ? .1 ? . ?? v confguration option: 3.15v ? .98 3.15 3.3 ? v confguration option: 4.2v 3.98 4. ? 4.4 ? v v lvd low voltage dete ? to ? voltage confguration option: 2.2v ? .08 ? . ? ? .3 ? v confguration option: 3.3v 3.1 ? 3.3 3.50 v confguration option: 4.4v 4.1 ? 4.4 4.70 v i ol1 i/o po ? t sink cu ?? ent 3v v ol =0.1v dd ? 1 ? ma 5v 10 ? 5 ma i oh1 i/o po ? t sou ?? e cu ?? ent 3v v oh =0.9v dd ?2 ?4 ma 5v ?5 ?8 ma i ol ? lcd common and segment cu ?? ent 3v v ol =0.1v dd ? 10 4 ? 0 a 5v 350 700 a i oh2 lcd common and segment cu ?? ent 3v v oh =0.9v dd ?80 ?160 a 5v ?180 ?360 a
rev. 1.30 1 ? ? a ??? ?? ? 013 rev. 1.30 17 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu symbol parameter test conditions min. typ. max. unit v dd conditions r ph pull- ? ig ? resistan ? e fo ? i/o po ? ts 3v ? 0 ? 0 100 k? 5v 10 30 50 k? note: 1. 32768hz is in slow start mode (rtcc.4=1) for the d.c. current measurement. 2. lcd waveform is in t ype a condition. 3. f s wh who forf r wh h whsw ph h whsw wh rw phyhw rwh h r ph owh oh r oo whw frwr oo shsho h 2 frwr rw phwrh w 6 whw ht56r642/ht56r644/ht56r654/ht56r656 ta= ? 5c symbol parameter test conditions min. typ. max. unit v dd conditions v dd ope ? ating voltage f sys =4mhz ? . ? 5.5 v f sys =8mhz 3.0 5.5 v f sys =12mhz 4.5 5.5 v av dd analog ope ? ating voltage v ref =av dd 3.0 5.0 v i dd1 ope ? ating cu ?? ent (c ? ystal osc ? rc osc) 3v no load, f sys =f ? =1mhz 170 ? 50 a 5v 380 570 a i dd ? ope ? ating cu ?? ent (c ? ystal osc ? rc osc) 3v no load, f sys =f ? =2mhz ? 40 3 ? 0 a 5v 490 730 a i dd3 ope ? ating cu ?? ent (c ? ystal osc ? rc osc) 3v no load, f sys =f ? =4mhz (note 5) 440 ?? 0 a 5v 900 1350 a i dd4 ope ? ating cu ?? ent (ec ? ode ? filte ? on) 3v no load, f sys =f ? =4mhz 380 570 a 5v 7 ? 0 1080 a i dd5 ope ? ating cu ?? ent (ec ? ode ? filte ? off) 3v no load, f sys =f ? =4mhz 370 550 a 5v ? 80 10 ? 0 a i dd ? ope ? ating cu ?? ent (c ? ystal osc ? rc osc) 5v no load, f sys =f ? =8mhz 1.8 ? .7 ma i dd7 ope ? ating cu ?? ent (c ? ystal osc ? rc osc) 5v no load, f sys =f ? =12mhz ? . ? 4.0 ma i dd8 ope ? ating cu ?? ent (slow ? ode ? f ? =4mhz) (c ? ystal osc ? rc osc) 3v no load, f sys =f slow =500khz 150 ?? 0 a 5v 340 510 a i dd9 ope ? ating cu ?? ent (slow ? ode ? f ? =4mhz) (c ? ystal osc ? rc osc) 3v no load, f sys =f slow =1mhz 180 ? 70 a 5v 400 ? 00 a i dd10 ope ? ating cu ?? ent (slow ? ode ? f ? =4mhz) (c ? ystal osc ? rc osc) 3v no load, f sys =f slow =2mhz ? 70 400 a 5v 5 ? 0 840 a i dd11 ope ? ating cu ?? ent (slow ? ode ? f ? =8mhz) (c ? ystal osc ? rc osc) 3v no load, f sys =f slow =1mhz ? 40 3 ? 0 a 5v 540 810 a i dd1 ? ope ? ating cu ?? ent (slow ? ode ? f ? =8mhz) (c ? ystal osc ? rc osc) 3v no load, f sys =f slow =2mhz 3 ? 0 480 a 5v ? 80 10 ? 0 a i dd13 ope ? ating cu ?? ent (slow ? ode ? f ? =8mhz) (c ? ystal osc ? rc osc) 3v no load, f sys =f slow =4mhz 500 750 a 5v 1000 1500 a
rev. 1.30 1? ?a??? ?? ?013 rev. 1.30 17 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu symbol parameter test conditions min. typ. max. unit v dd conditions i dd14 ope ? ating cu ?? ent (f sys =32768hz (note 1) or 32k internal rc osc) 3v wdt off ? lcd on (note ? ) ? 1/5 bias (r bias =1m?), v lcd =v dd 8 1 ? a 5v 14 ? 1 a i dd15 ope ? ating cu ?? ent (f sys =32768hz (note 1) or 32k internal rc osc) 3v wdt off ? lcd on (note ? ) ? 1/4 bias (r bias =800k?), v lcd =v dd 8 1 ? a 5v 14 ? 1 a i dd1 ? ope ? ating cu ?? ent (f sys =32768hz (note 1) or 32k internal rc osc) 3v wdt off ? lcd on (note ? ) ? 1/3 bias (r bias =600k?), v lcd =v dd 10 15 a 5v 1 ? ? 4 a i dd17 ope ? ating cu ?? ent (f sys =32768hz (note 1) or 32k internal rc osc) 3v wdt off ? lcd on (note ? ) ? 1/5 bias (r bias =100k?), v lcd =v dd 30 45 a 5v 50 75 a i dd18 ope ? ating cu ?? ent (f sys =32768hz (note 1) or 32k internal rc osc) 3v wdt off ? lcd on (note ? ) ? 1/4 bias (r bias =80k?), v lcd =v dd 40 ? 0 a 5v ? 0 90 a i dd19 ope ? ating cu ?? ent (f sys =32768hz (note 1) or 32k internal rc osc) 3v wdt off ? lcd on (note ? ) ? 1/3 bias (r bias =60k?), v lcd =v dd 50 75 a 5v 80 1 ? 0 a i dd ? 0 ope ? ating cu ?? ent (f sys =32768hz (note 1) or 32k internal rc osc) 3v no load, lcd off, wdt off, ? 9 a 5v 10 15 a i stb1 standby cu ?? ent (sleep) (f sys ? f sub ? f s ? f lcd ? f wdt =off) 3v no load, system halt, lcd off ? wdt off 0. ? 1.0 a 5v 0.3 ? .0 a i stb ? standby cu ?? ent (sleep) (f sys ? f lcd ? f wdt =f sub =32768hz (note 1) or 32k rc osc) 3v no load, system halt, lcd off ? wdt off 1 ? a 5v 3 5 a i stb3 standby cu ?? ent (idle) (f sys ? f wdt =off; f s (note 3) =f sub =32768hz (note 1) or 32k rc osc) 3v no load, system halt, wdt off ? lcd on (note ? ) ? 1/5 bias (r bias =1m?), v lcd =v dd ? 10 a 5v 10 15 a i stb4 standby cu ?? ent (idle) (f sys ? f wdt =off; f s (note 3) =f sub =32768hz (note 1) or 32k rc osc) 3v no load, system halt, wdt off ? lcd on (note ? ) ? 1/4 bias (r bias =800k?), v lcd =v dd ? 10 a 5v 10 15 a i stb5 standby cu ?? ent (idle) (f sys ? f wdt =off; f s (note 3) =f sub =32768hz (note 1) or 32k rc osc) 3v no load, system halt, wdt off ? lcd on (note ? ) ? 1/3 bias (r bias =600k?), v lcd =v dd 8 1 ? a 5v 1 ? 1 ? a i stb ? standby cu ?? ent (idle) (f sys ? f wdt =off; f s (note 3) =f sub =32768hz (note 1) or 32k rc osc) 3v no load, system halt, wdt off ? lcd on (note ? ) ? 1/5 bias (r bias =100k?), v lcd =v dd ?? 39 a 5v 44 ?? a i stb7 standby cu ?? ent (idle) (f sys ? f wdt =off; f s (note 3) =f sub =32768hz (note 1) or 32k rc osc) 3v no load, system halt, wdt off ? lcd on (note ? ) ? 1/4 bias (r bias =80k?), v lcd =v dd 3 ? 48 a 5v 54 81 a i stb8 standby cu ?? ent (idle) (f sys ? f wdt =off; f s (note 3) =f sub =32768hz (note 1) or 32k rc osc) 3v no load, system halt, wdt off ? lcd on (note ? ) ? 1/3 bias (r bias =60k?), v lcd =v dd 44 ?? a 5v 70 105 a
rev. 1.30 18 ? a ??? ?? ? 013 rev. 1.30 19 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu symbol parameter test conditions min. typ. max. unit v dd conditions i stb9 standby cu ?? ent (idle) (f sys on ? f sys =f ? =4mhz, f wdt ? f lcd off; f s (note 3) =f sub =32768hz (note 1) or 32k rc osc) 3v no load, system halt, lcd off ? wdt off ? spi o ? i ? c on, pclk on, pclk=f sys /8 150 ? 50 a 5v 350 550 a v il1 input low voltage fo ? i/o po ? ts ? tmr and int 0 0.3v dd v v ih1 input high voltage for i/o ports, tmr and int 0.7v dd v dd v v il ? input low voltage ( res) 0 0.4v dd v v ih2 input high voltage ( res) 0.9v dd v dd v v lvr low voltage reset voltage confguration option: 4.2v 3.98 4. ? 4.4 ? v confguration option: 3.15v ? .98 3.15 3.3 ? v confguration option: 2.1v 1.98 ? .1 ? . ?? v v lvd low voltage dete ? to ? voltage confguration option: 2.2v ? .08 ? . ? ? .3 ? v confguration option: 3.3v 3.1 ? 3.3 3.50 v confguration option: 4.4v 4.1 ? 4.4 4.70 v i ol1 i/o po ? t sink cu ?? ent (pa ? pb ? pd; seg ? co ? level o ? led output) 3v v ol =0.1v dd ? 1 ? ma 5v 10 ? 5 ma i oh1 i/o po ? t sou ?? e cu ?? ent (pa ? pb ? pd; seg ? co ? level o ? led output) 3v v oh =0.9v dd ?2 ?4 ma 5v ?5 ?8 ma i ol ? lcd common and segment cu ?? ent 3v v ol =0.1v dd ? 10 4 ? 0 a 5v v ol =0.1v dd 350 700 a i oh2 lcd common and segment cu ?? ent 3v v oh =0.9v dd ?80 ?160 a 5v v oh =0.9v dd ?180 ?360 a r ph pull- ? ig ? resistan ? e fo ? i/o po ? ts 3v ? 0 ? 0 100 k? 5v 10 30 50 k? note: 1. 32768hz is slow start mode (rtcc.4=1) in d.c. current measurement. 2. lcd waveform is in t ype a condition. 3. f s who forf r h ph h ph r ph owh oh oo whw frwr oo shsho h 2 frwr rw phwrh w 6 whw
rev. 1.30 18 ?a??? ?? ?013 rev. 1.30 19 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu a.c. characteristics ta= ? 5c symbol parameter test conditions min. typ. max. unit v dd conditions f sys system clo ? k (c ? ystal osc ? rc osc) ? . ? v~5.5v 3 ? 4000 khz 3.0v~5.5v 3 ? 8000 khz 4.5v~5.5v 3 ? 1 ? 000 khz f rtcosc rtc f ? equen ? y 3 ? 7 ? 8 hz f ti ? er time ? i/p f ? equen ? y (t ? r0/t ? r1) ? . ? v~5.5v 0 4000 khz 3.0v~5.5v 0 8000 khz 4.5v~5.5v 0 1 ? 000 khz f rc32k 32k rc oscillator ? . ? v~5.5v afte ? t ? im ? 8.8 3 ? .0 35. ? khz t res exte ? nal reset low pulse widt ? 1 s t lvr low voltage reset time 0.1 0.4 0. ? ms t sst1 system sta ? t-up time ? pe ? iod powe ? -on 10 ? 4 t sys * t sst ? system sta ? t-up time ? pe ? iod fo ? xtal o ? rtc os ? illato ? wake-up f ? om powe ? down ? ode 10 ? 4 t sys * t sst3 system sta ? t-up time ? pe ? iod fo ? exte ? nal rc o ? exte ? nal clo ? k wake-up f ? om powe ? down ? ode 1 ? t sys * t int inte ?? upt pulse widt ? 1 s 1rw w sys sys1 r sys2
rev. 1.30 ? 0 ? a ??? ?? ? 013 rev. 1.30 ?1 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu adc characteristics HT56R62/ht56r65 ta= ? 5c symbol parameter test conditions min. typ. max. unit v dd conditions v ad a/d input voltage 5 ? qfp ? ? 4lqfp 0 av dd v 100qfp 0 v ref v v ref a/d input refe ? en ? e voltage range av dd =5v 1. ? av dd +0.1 v dnl adc differential non-linearity av dd =5v ? v ref =av dd ? t ad =0.5s ?2 ? lsb inl adc integral non-linearity av dd =5v ? v ref =av dd ? t ad =0.5s ?4 4 lsb i adc additional powe ? consumption if a/d conve ? te ? is used 3v 0.50 0.75 ma 5v 1.0 1.5 ma t ad a/d clo ? k pe ? iod 0.5 s t adc a/d conve ? sion time 1 ? t ad ht56r642/ht56r644/ht56r654/ht56r656 ta= ? 5c symbol parameter test conditions min. typ. max. unit v dd conditions v ad a/d input voltage 1 ? 8qfp 0 av dd v 100qfp 0 v ref v v ref a/d input refe ? en ? e voltage range av dd =5v 1. ? av dd +0.1 v dnl adc differential non-linearity av dd =5v ? v ref =av dd ? t ad =0.5s ?2 ? lsb inl adc integral non-linearity av dd =5v ? v ref =av dd ? t ad =0.5s ?4 4 lsb i adc additional powe ? consumption if a/d conve ? te ? is used 3v 0.50 0.75 ma 5v 1.0 1.5 ma t ad a/d clo ? k pe ? iod 0.5 s t adc a/d conve ? sion time 1 ? t ad power-on reset characteristics ta= ? 5c symbol parameter test conditions min. typ. max. unit v dd conditions v por v dd sta ? t voltage to ensu ? e powe ? -on reset 100 mv r por v dd rise slew rate to ensu ? e powe ? -on reset 0.035 v/ms t por ? inimum time to ensu ? e powe ? -on reset v por =0.1v 1 ms
rev. 1.30 ?0 ?a??? ?? ?013 rev. 1.30 ? 1 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu system architecture a key factor in the high-performan ce features of the holtek range of microcontrollers is attributed to their internal system architecture. the range of devices take advantag e of the usual features found within ris c microcontrollers providing increas ed s peed of operation and enhanced performance. the pi pelining sc heme i s i mplemented i n suc h a wa y t hat i nstruction fe tching a nd i nstruction execution a re ove rlapped, he nce i nstructions a re e ffectively e xecuted i n one c ycle, wi th t he exception of branch or call instructions. an 8-bit wide alu is used in practically all instruction set operations, which carries out arithm etic operations, logic operations, rotation, increment, decrement, branch decisions, etc. the internal data path is simplifed by moving data through the accumulator and the alu. certain internal registers are implemented in the data memory and can be directly or indirectly addresse d. the simple addressi ng met hods of these registers along with additi onal architectural features ensure that a minimum of external components is required to provide a functional i/o and a/d control system with maximum reliability and flexibility . this makes the device suitable for low-cost, high-volume production for controller applications. clocking and pipelining the main system clock, derived from either a crystal/resonator or rc oscillator is subdivided into four internally generated non-overlapping clocks, t1~t4. the program counter is incremented at the beginning of the t1 clock during which time a new instruction is fetched. the remaining t2~t4 clocks carry out the decoding and execution functions. in this way , one t1~t4 clock cycle forms one instruction cycle. although the fetching and execution of instructio ns takes place in consecutive instruction c ycles, t he pi pelining st ructure of t he m icrocontroller e nsures t hat i nstructions a re effectively executed in one instruction cycle. the exception to this are instructions where the contents of the program counter are changed, such as subroutine calls or jumps, in which case the instruction will take one more instruction cycle to execute. when the rc oscillator is used, osc2 is free for use as a t1 phase clock synchronizing pin. this t1 phase clock has a frequency of f sys /4 with a 1:3 high/low duty cycle.
? ? ? ? ? system clocking and pipelining
rev. 1.30 ?? ? a ??? ?? ? 013 rev. 1.30 ?3 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu for instructions involving branches, such as jump or call instructions, two machine cycles are required to complete instruction execution. an extra cycle is required as the program takes one cycle t o frst obt ain t he a ctual j ump or c all a ddress a nd t hen a nother c ycle t o a ctually e xecute t he branch. the requirement for this extra cycle should be taken into accou nt by programmers in timing sensitive applications.
? ? ? ? ? ? ? ? ? ? instruction fetching program counter during program execution, the program counter is used to keep track of the address of the next instruction to be executed. it is automatically incremented by one each time an instruction is executed except for instructions, such as jmp or call that demand a jump to a non-consecutive program memory a ddress. it m ust be not ed t hat onl y t he l ower 8 bi ts, known a s t he progra m count er l ow register, are directly addressable. when executi ng instructions re quiring jumps to non-consecutive addresses suc h as a jump instruction, a subrout ine c all, i nterrupt or re set, e tc., t he m icrocontroller m anages progra m c ontrol by loading the required address into the program counter . for conditional skip instructions, once the condition has been met, the next instruction, which has already been fetched during the present instruction execut ion, is discarded and a dummy cycle takes its place while the correct instruction is obtained. the lower byte of the program counter , known as the program counter low register or pcl, is available for program control and is a readable and writable register . by transferring data directly into this register , a short program jump can be executed directly , however , as only this low byte is available for manipulation, the jumps are limited to the present page of memory, that is 256 locations. when such program jumps are executed it should also be noted that a dummy cycle will be inserted. the lower byte of the program counter is fully accessible under program control. manipulating the pcl might cause program branchin g, so an extra cycle is needed to pre-fetch. further information on the pcl register can be found in the special function register section.
rev. 1.30 ?? ?a??? ?? ?013 rev. 1.30 ? 3 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu mode program counter bits b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 initial reset 0 0 0 0 0 0 0 0 0 0 0 0 0 exte ? nal inte ?? upt 0 0 0 0 0 0 0 0 0 0 0 1 0 0 exte ? nal inte ?? upt 1 0 0 0 0 0 0 0 0 0 1 0 0 0 timer/event counter 0 overfow 0 0 0 0 0 0 0 0 0 1 1 0 0 timer/event counter 1 overfow 0 0 0 0 0 0 0 0 1 0 0 0 0 spi/i ? c inte ?? upt 0 0 0 0 0 0 0 0 1 0 1 0 0 ? ulti-fun ? tion inte ?? upt 0 0 0 0 0 0 0 0 1 1 0 0 0 skip p ? og ? am counte ? + ? loading pcl pc1 ? pc11 pc10 pc9 pc8 @7 @ ? @5 @4 @3 @ ? @1 @0 jump ? call b ? an ?? #1 ? #11 #10 #9 #8 #7 # ? #5 #4 #3 # ? #1 #0 retu ? n f ? om sub ? outine s1 ? s11 s10 s9 s8 s7 s ? s5 s4 s3 s ? s1 s0 program counter note: pc12~pc8: current program counter bits @7~@0: pcl bits #12~#0: instruction code address bits s12~s0: stack register bits for the ht56r65/ht56r654/ht56r656, the program counter is 13 bits wide, i.e. from b12~b0. for the ht 56r642/ht56r644, the progra m count er is 12 bit s wi de, i.e . from b1 1~b0, the refore the b12 column in the table is not applicable. for the HT56R62, the program counter is 11 bits wide, i.e. from b10~b0, therefore the b12 and b11 columns in the table are not applicable. stack this is a special part of the memory which is used to save the contents of the program counter only . the stack has multiple levels depending upon the device and is neither part of the data nor part of the program space, and is neither readable nor writeable. the activated level is indexed by the stack pointer, sp , and is neither readable nor writeable. at a subroutine call or interrupt acknowledge signal, the contents of the program counter are pushed onto the stack. at the end of a subroutine or an interrupt routine, signaled by a return instruction, ret or reti, the program counter is restored to its previous value from the stack. after a device reset, the stack pointer will point to the top of the stack. if the stack is full and an enabled interrupt takes place, the interrupt request fag will be recorded but the acknowledge signal will be inhibited. when the stack pointer is decremented, by ret or reti, the interrupt will be serviced. this feature prevents stack overfow allo wing the programmer to use the struct ure more easily . however , when the stack is full, a call subroutine instruction can still be execu ted which will result in a stack overfow . precautions should be taken to avoid such cases which might cause unpredictable program branching.
rev. 1.30 ? 4 ? a ??? ?? ? 013 rev. 1.30 ?5 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu
note: 6 levels of stack are available for the HT56R62, 8 levels of stack are available for the ht56r642/ ht56r644 and 12 levels of stack are available for the ht56r65/ht56r654/ ht56r656. arithmetic and logic unit ? alu the arith metic-logic unit or alu is a critical area of the microcontrol ler that carries out arithmetic and logic operations of the instructi on set. connected to the main micro controller data bus, the alu receives related ins truction codes and performs the required arithmetic or logical operations after which the result will be placed in the specifed register . as these alu calculation or operations may result in carry , borrow or other status changes, the status register will be correspondingly updated to refect these changes. the alu supports the following functions: ? arithmetic operations: add, addm, adc, adcm, sub, subm, sbc, sbcm, daa ? logic operations: and, or, xor, andm, orm, xorm, cpl, cpla ? rotation rra, rr, rrca, rrc, rla, rl, rlca, rlc ? increment and decrement inca, inc, deca, dec ? branch decision, jmp, sz, sza, snz, siz, sdz, siza, sdza, call, ret, reti
rev. 1.30 ?4 ?a??? ?? ?013 rev. 1.30 ? 5 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu program memory the program memory is the locatio n where the user code or program is stored. for these device the program memory is an otp type, which means it can be programmed only one time. by using the appropriate programming tools, this otp memory device of fer users the fexibility to conveniently debug and develop their applications while also offering a means of feld programming. structure the program memory has a capacity of 2k14 bits to 8k16 bits. the program memory is addressed by the program counter and also contains data, tabl e informati on and interrupt entries. table data, which can be setup in any location within the program memory , is addressed by a separate table pointer register.

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rev. 1.30 ?? ? a ??? ?? ? 013 rev. 1.30 ?7 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu special vectors within t he progra m me mory, c ertain l ocations a re re served for spe cial usa ge suc h a s re set a nd interrupts. ? location 000h this vector is reserved for use by the device reset for program initialisation. after a device reset is initiated, the program will jump to this location and begin execution. ? location 004h this vector is used by the external interrupt 0. if the external interrupt pin receives an active edge, t he p rogram wi ll j ump t o t his l ocation a nd b egin e xecution i f t he e xternal i nterrupt i s enabled and the stack is not full. ? location 008h this vector is used by the external interrupt 1. if the external interrupt pin receives an active edge, t he p rogram wi ll j ump t o t his l ocation a nd b egin e xecution i f t he e xternal i nterrupt i s enabled and the stack is not full. ? location 00ch this internal vector is used by the t imer/event counter 0. if a t imer/event counter 0 overfow occurs, the program will jump to this location and begin execution if the timer/event counter interrupt is enabled and the stack is not full. ? location 010h this internal vector is used by the t imer/event counter 1. if a t imer/event counter 1 overfow occurs, the program will jump to this location and begin execution if the timer/event counter interrupt is enabled and the stack is not full. ? location 014h this internal vector is used by the spi/i 2 c interrupt. when either an spi or i 2 c bus, dependent upon which one is selected, requires data transfer , the program will jump to this location and begin execution if the spi/i 2 c interrupt is enabled and the stack is not full. ? location 018h this internal vector is used by the multi-function interrupt. the multi-function interrupt vector is shared by several internal functions such as a t ime base overfow , a real t ime clock overfow , an a/d converter conversion completion, an active edge appearing on the external peripheral interrupt pi n or a t imer/event count er 2 overfow . t he progra m wi ll j ump t o t his l ocation a nd begin execution if the relevant interrupt is enabled and the stack is not full.
rev. 1.30 ?? ?a??? ?? ?013 rev. 1.30 ? 7 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu look-up table any location within the program memory can be defned as a look-up table where programmers can store fxed data. t o use the look-up table, the table pointer must frst be setup by placing the lower order a ddress o f t he l ook u p d ata t o b e r etrieved i n t he t able p ointer r egister, t blp. t his r egister defnes the lower 8-bit address of the look-up table. after setting up the table pointer , the table data can be retrieved from the current program memory page or last program memory page using the t abrdc [m] or t abrdl [m] instructions, respectively. when these instructions are executed, the lower order table byte from the program memory will be transferred to the user defined data memory register [m] as specified in the instruction. the higher order ta ble data byt e from the program mem ory wi ll be transferred to the tblh special register. any unused bits in this transferred higher order byte will be read as 0. the following diagram illustrates the addressing/data fow of the look-up table:
instruction table location bits b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 tabrdc [m] pc1 ? pc11 pc10 pc9 pc8 @7 @ ? @5 @4 @3 @ ? @1 @0 tabrdl [m] 1 1 1 1 1 @7 @ ? @5 @4 @3 @ ? @1 @0 table location note: pc12~pc8: current program counter bits @7~@0: t able pointer tblp bits for t he ht 56r65/ht56r654/ht56r656, t he t able a ddress l ocation i s 13 bi ts, i .e. from b12~b0. for the ht56r642/ht56r644, the t able address location is 12 bits, i.e. from b11~b0. for the HT56R62, the t able address location is 11 bits, i.e. from b10~b0.
rev. 1.30 ? 8 ? a ??? ?? ? 013 rev. 1.30 ?9 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu table program example the following example shows how the table pointer and table data is defned and retrieved from the microcontroller. this example uses raw table data located in the last page which is stored there using the org statemen t. the value at this org statement is 700h which refers to the start address of the last page within the 2k program memory of the HT56R62. the table pointer is setup here to have an initial value of 06h. this will ensure that the frst data read from the data table will be at the program memory address 706h or 6 locations after the start of the last page. note that the value for the table pointer is referenced to the frst address of the present page if the t abrdc [m] instruction is being used. the high byte of the table data which in this case is equal to zero will be transferred to the tblh register automatically when the tabrdl [m] instruction is executed. because the tblh register is a read-only register and cannot be res tored, care should be taken to ensure its protection if both the main routine and interrupt s ervice routine us e table read instructions. if using the table read instructions, the interrupt service routines may change the value of the tblh and subsequently cause errors if used again by the main routine. as a rule it is recommended that simultaneous use of the table read instructions should be avoided. however , in situations where simultaneous use cannot be avoided, the interrupts should be disabled prior to the execution of any main routine table-read instructions. note that all table related instructions require two instruction cycles to complete their operation. tempreg1 d b ? ; temporary register #1 tempreg2 d b ? ; temporary register #2 : : mov a ,06h ; initialise table pointer - note that this address is referenced mov t blp,a ; to the last page or present page : : tabrdl t empreg1 ; transfers value in table referenced by table pointer to tempregl ; d ata a t pr og. m emory a ddress 706h t ransferred t o t empreg1 a nd t blh dec t blp ; reduce value of table pointer by one tabrdl t empreg2 ; transfers value in table referenced by table pointer to tempreg2 ; d ata a t p rog.memory ad dress 705h t ransferred t o t empreg2 a nd t blh ; i n t his e xample t he d ata 1ah i s t ransferred t o ; t empreg1 a nd d ata 0fh t o r egister t empreg2 : : org 700h ; sets i nitial a ddress o f l ast p age dc 00ah, 00 bh, 00 ch, 00 dh, 00 eh, 00 fh, 01 ah, 01 bh : :
rev. 1.30 ?8 ?a??? ?? ?013 rev. 1.30 ? 9 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu data memory the data memory is a volatile area of 8-bit wide ram internal memory and is the location where temporary information is stored. divided into three sections, the frst of these is an area of ram where special function registers are located. these registers have fxed locations and are necessary for correct operati on of the device. many of these registers can be read from and written to directly under program control, however , some remain protected from user manipulation. the second area of data memory is reserved for general purpose use. all locations within this area are read and write accessible under program control. the third area is reserved for the lcd memory . this special area of data memory is mapped directly to the lcd display so data written into this memory area will directly af fect the displayed data. the addresses of the lcd memory area overlap those in the general purpos e data memory area. switching between the dif ferent data memory banks is achieved by setting the bank pointer to the correct value. structure the da ta me mory i s subdi vided i nto se veral ba nks, a ll of whi ch a re i mplemented i n 8-bi t wi de ram. the data memory located in bank 0 is subdivided into two sections, the special purpose data memory and the general purpose data memory. the start addres s of the d ata memory for all devices is the addres s 00h. registers w hich are common to all microcontrollers, such as acc, pcl, etc., have the same data memory address. the lcd memory is mapped into bank. banks 2 to 6 contain only general purpose data memory for those devices with lar ger data memory capacities. as the special purpose data memory registers are mapped into all bank areas, they can subsequently be accessed from any bank location.

data memory structure general purpose data memory all microcontroller programs require an area of read/write memory where temporary data can be stored and retrieve d for use later . it is this area of ram memory that is known as general purpose data memory . this area of data memory is fully accessible by the user program for both read and write operations. by using the se t [m].i and clr [m].i instructio ns individual bits can be set or reset under program control giving the user a lar ge range of fexibility for bit manipulation in the data memory . for devices with lar ger data memory capacities, the general purpose data memory , in addition to being located in bank 0, is also stored in banks 2 to 6, the actual number of banks present depends upon the device selected.
rev. 1.30 30 ? a ??? ?? ? 013 rev. 1.30 31 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu special purpose data memory this area of data memory is where registers, necessary for the correct operation of the microcontroller, are stored. mos t of the regis ters are both read and w rite type but some are protected and are read only, t he d etails o f wh ich a re l ocated u nder t he r elevant spe cial fu nction r egister se ction. no te t hat for locations that are unused, any read instruction to these addresses will return the value 00h. the special function registers are mapped into all banks and can therefore be accessed from any bank location. bank number 0 1 2 3 4 5 6 HT56R62C128 bytes spd ? sa common 00h x x x x ea common 3fh x x x x gpd ? sa 40h 40h 40h x x x x ea 7fh 58h 7fh x x x x ht56r65C576 bytes spd ? sa common 00h x x x ea common 3fh x x x gpd ? sa 40h 40h 40h 40h x x x ea ffh 68h ffh ffh x x x ht56r642C384 bytes spd ? sa common 00h x x x x ea common 3fh x x x x gpd ? sa 40h 40h 40h x x x x ea ffh 5fh ffh x x x x ht56r644C576 bytes spd ? sa common 00h x x x ea common 3fh x x x gpd ? sa 40h 40h 40h 40h x x x ea ffh 7fh ffh ffh x x x ht56r654C1152 bytes spd ? sa common 00h ea common 3fh gpd ? sa 40h 40h 40h 40h 40h 40h 40h ea ffh 7fh ffh ffh ffh ffh ffh ht56r656C1152 bytes spd ? sa common 00h ea common 3fh gpd ? sa 40h 40h 40h 40h 40h 40h 40h ea ffh 9fh ffh ffh ffh ffh ffh data memory content note: spdm: special purpose data memory gpdm: general purpose data memory sa: start address ea: end address x: not implemented
rev. 1.30 30 ?a??? ?? ?013 rev. 1.30 31 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu
? ? ? ?? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? - ? ?? ?? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? - ? ? ?? ? ? ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? - ? ? ?? ?? ? ? ? ? ? ? ? ? ? ? ? ? special purpose data memory
rev. 1.30 3 ? ? a ??? ?? ? 013 rev. 1.30 33 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu display memory the d ata t o b e d isplayed o n t he l cd o r l ed d isplay i s st ored i n a n a rea o f f ully a ccessible da ta memory. by wri ting t o t his are a of ram, t he displ ay output ca n be dire ctly c ontrolled by t he application program . as t his me mory e xists i n bank 1, but have a ddresses whi ch m ap i nto t he general purpose data memory , it is necessary to frst ensure that the bank pointer is set to the value 01h before accessing the display memory . the display memory can only be accessed indirectly using the memory pointer mp1 and the indirect addressing register iar1. when the bank pointer is set to bank 1 to access the display memory , if any addresses with a value less than 40h are read, the special purpose memory in bank 0 will be accessed. also, if the bank pointer is set to bank 1, if any addresses higher than the last address in bank 1 are read, then a value of 00h will be returned. special function registers to ensure successful operation of the microcontroller , certain internal registers are implemented in the data memory area. these registers ensure correct operation of internal functions such as timers, interrupts, etc., as well as external functions such as i/o data control and a/d converter operation. the locat ion of these registers within the data memory begins at the address 00h. any unused data memory locations between these special function registers and the point where the general purpose memory begins is reserved for future expansion purposes, attempting to read data from these locations will return a value of 00h. indirect addressing registers ? iar0, iar1 the indirect addressing registers, iar0 and iar1, although having their locations in normal ram register space, do not actually physically exist as normal registers. the method of indirect addressing for ram data manipulation uses these indirect addressing registers and memory pointers, in contrast to direct memory addressing, where the actual memory address is specifed. actions on the iar0 and iar1 registers will result in no actual read or write operatio n to these registers but rather to the memory location specifed by their corresponding memory pointers, mp0 or mp1. acting as a pair, iar0 and mp0 can together access data from bank 0 while the iar1 and mp1 register pair can access data from any bank. as the indirect addressing registers are not physically implemented, reading the indirect addressing registers indirectly will return a result of 00h and writing to the registers indirectly will result in no operation.
rev. 1.30 3? ?a??? ?? ?013 rev. 1.30 33 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu memory pointers ? mp0, mp1 two me mory po inters, k nown a s mp0 a nd mp1 a re p rovided. t hese me mory po inters a re physically implemented in the data memory and can be manipulated in the same way as normal registers providing a convenient way with which to address and track data. when any operation to the releva nt indirect addressing registers is carried out, the actual address that the microcontroller is directed to, is the address specifed by the related memory pointer . mp0, together with indirect addressing register , iar0, are used to access data from bank 0, while mp1 and iar1 are used to access data from all banks. the following example shows how to clear a section of four ram locations already defined as locations adres1 to adres4. data . section data adres1 d b ? adres2 d b ? adres4 d b ? block d b ? org 00h start: m ov a,04h ; setup size of block m ov block,a 0 0 loop: , 0 i nc mp0 ; increment memory pointer s dz block ; check if last memory location has been cleared jm p loop continue: the important point to note here is that in the example shown above, no reference is made to specifc ram addresses.
rev. 1.30 34 ? a ??? ?? ? 013 rev. 1.30 35 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu bank pointer ? bp the data memory is divided several banks, the total number of which depends upon the device chosen. sel ecting t he re quired da ta me mory a rea i s a chieved usi ng t he ba nk poi nter. if da ta i n bank 0 is to be accessed, then the bp register must be loaded with the value 00h, while if data in bank 1 is to be accessed, then the bp register must be loaded with the value 01h, and so on. the data memory is initialised to bank 0 after a reset, except for the wdt time-out reset in the power down mode, in which case, the data memory bank remains unaf fected. it should be noted that the special function data memory is not af fected by the bank selection, which means that the special function registers can be accessed from within any bank. directly addressing the data memory will always result in bank 0 being accessed irrespective of the value of the bank pointer . accessing data from banks other than bank 0 must be implemented using indirect addressing.

bank pointer accumulator ? acc the a ccumulator is central to the operation of any microcontroller and is clos ely related w ith operations carried out by the alu. the accumulator is the place where all intermediate results from the alu are stored. w ithout the accumulator it would be necessary to write the result of each c alculation or l ogical ope ration suc h a s a ddition, subt raction, shi ft, e tc., t o t he da ta me mory resulting i n highe r program ming and t iming overheads. da ta t ransfer operat ions usual ly i nvolve the t emporary st orage func tion of t he ac cumulator; for e xample, wh en t ransferring da ta be tween one user defi ned regi ster and anot her, it is necessary to do this by passing the data through the accumulator as no direct transfer between two registers is permitted. program counter low register ? pcl to provide additional program control functions, the low byte of the program counter is made accessible to programmers by locating it within the special purpose area of the data memory . by manipulating this register , direct jumps to other program locations are easily implemented. loading a value directly into this pcl register will cause a jump to the specifed program memory location, however, as the register is only 8-bit wide, only jumps within the current program memory page are permitted. when such operations are used, note that a dummy cycle will be inserted.
rev. 1.30 34 ?a??? ?? ?013 rev. 1.30 35 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu look-up table registers ? tblp, tblh these two special function registers are used to control operation of the look-up table which is stored in the program memory . tblp is the table pointer and indicates the location where the table data is located. its value must be setup before any table read commands are executed. its value can be c hanged, for e xample usi ng t he inc or dec i nstructions, a llowing for e asy t able da ta pointing and reading. tblh is the location where the high order byte of the table data is stored after a table read data instruction has been executed. note that the lower order table data byte is transferred to a user defned location. status register ? status this 8-bit register contains the zero fag (z), carry fag (c), auxiliary carry fag (ac), overfow fag (ov), power down fag (pdf), and watchdog time-out fag (t o). these arithmetic/logical operation and system management fags are used to record the status and operation of the microcontroller. with the exceptio n of the t o and pdf fags, bits in the status register can be altered by instructions like most other registers. any data written into the status register will not change the t o or pdf fag. in addition, operations related to the status register may give dif ferent results due to the dif ferent instruction operati ons. the t o fag can be af fected only by a system power -up, a wdt time-out or by executing the clr wdt or halt instruction. the pdf fag is af fected only by executing the halt or clr wdt instruction or during a system power-up. the z, ov, ac and c fags generally refect the status of the latest operations. ? c is set if an operation results in a carry during an addition operation or if a borrow does not take place during a subtraction operation; otherwise c is cleared. c is also af fected by a rotate through carry instruction. ? ac is set if an operation results in a carry out of the low nibbles in addition, or no borrow from the high nibble into the low nibble in subtraction; otherwise ac is cleared. ? z is set if the result of an arithmetic or logical operation is zero; otherwise z is cleared. ? ov is set if an operation results in a carry into the highest-order bit but not a carry out of the highest-order bit, or vice versa; otherwise ov is cleared. ? pdf i s c leared by a syst em powe r-up or e xecuting t he clr w dt i nstruction. pdf i s se t by executing the halt instruction. ? to is cle ared by a system power -up or executing the clr wdt or hal t instruction. to is set by a wdt time-out.

? ? ? ? ?? ?- ?? status register in additio n, on entering an interrup t sequence or executing a subroutine call, the status register will not be pushed onto the stack automatically . if the contents of the status registers are important and if the subroutine can corrupt the status register, precautions must be taken to correctly save it.
rev. 1.30 3 ? ? a ??? ?? ? 013 rev. 1.30 37 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu interrupt control registers these 8-bit registe rs, intc0, intc1, mfic, mfic0, mfic1 and intedge, control the operation of the device interrupt functions. by setting various bits within these registers using standard bit manipulation ins tructions, the enable/dis able function of each interrupt can be independently controlled. a master interrupt bit within the intc0 register , the emi bit, acts like a global enable/disable and is used to set all of the interrupt enable bits on or of f. this bit is cleared when an interrupt routine is entered to disable further interrupt and is set by executing the reti instruction. the int edge re gister i s use d t o sel ect t he a ctive e dges for t he t wo e xternal i nterrupt pi ns int 0 and int1. timer/event counter registers the devi ces c ontain se veral i nternal 8-bi t a nd 16-bi t t imer/event count ers, t he a ctual a mount depends upon which device is selected. the registers tmr0, tmr1, tmr2 and the register pair tmr1l/tmr1h are the locations where the timer values are located. these registers can also be preloaded with fxed data to allow dif ferent time intervals to be setup. the associated control registers, t mr0c, t mr1c a nd t mr2c c ontain t he se tup i nformation for t hese t imers, whi ch determines i n wha t m ode t he t imer i s t o be use d a s we ll a s c ontaining t he t imer on/ off c ontrol function. input/output ports and control registers within the area of special function registers, the i/o registers and their associated control registers play a prominent role. all i/o ports have a designated register correspondingly labeled as p a, pb and pd. these labeled i/o registers are mapped to specifc addresses within the data memory as shown in the data memory table, which are used to transfer the appropriate output or input data on that port. w ith each i/o port there is an associated control register labeled p ac, pbc and pdc, also mapped to specifc addresses with the data memory . the control register specifes which pins of that port are set as inputs and which are set as outputs. t o setup a pin as an input, the corresponding bit of the control register must be set high, for an output it must be set low . during program initialization, it is important to frst setup the control registers to specify which pins are outputs and which are inputs b efore r eading d ata f rom o r wr iting d ata t o t he i /o p orts. on e fe xible f eature o f t hese r egisters is the ability to directly program single bits using the set [m].i and clr [m].i instructions. the ability to change i/o pins from output to input and vice versa by manipulating specifc bits of the i/o control registers during normal program operation is a useful feature of these devices. pulse width modulator registers the d evices c ontain m ultiple pu lse w idth mo dulator o utputs e ach wi th t heir o wn r elated i ndependent control register pair , known as pwm0l/pwm0h, pwm1l/pwm1h, pwm2l/pwm2h and pwm3l/pwm3h. the 12-bit conte nts of each register pair , which defnes the duty cycle value for the modulation cycle of the pulse w idth modulator , along with an enable bit are contained in these register pairs. a/d converter registers C adrl, adrh, adcr, acsr the device contains a multiple channel 12-bit a/d converter . the correct operation of the a/d requires the use of two data registers and two control registers. the two data registers, a high byte data register known as adrh, and a low byte data register known as adrl, are the register locations where the digital value is placed after the completion of an analog to digital conversion cycle. functions such as the a/d enable/disable, a/d channel selection and a/d clock frequency are determined using the two control registers, adcr and acsr.
rev. 1.30 3? ?a??? ?? ?013 rev. 1.30 37 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu serial interface registers the d evice c ontains t wo se rial i nterfaces, a n spi a nd a n i 2 c i nterface. t he si mctl0, si mctl1, simctl2 and simar are the control registers for the serial interface function while the simdr is the data register for the serial interface data. port a wake-up register ? pawu all p ins o n po rt a h ave a wa ke-up f unction e nable a l ow g oing e dge o n t hese p ins t o wa ke-up the device when it is in a power down mode. the pins on port a that are used to have a wake-up function are selected using this resister. pull-high resistors ? papu, pbpu, pdpu all i/o pins on ports p a, pb and pd, if setup as inputs, can be connected to an internal pull-high resistor. the pins which require a pull-high resistor to be connected are selected using these registers. register ? clkmod the device operates using a dual clock system whose mode is controlled using this register . the register controls functions such as the clock source, the idle mode enable and the division ratio for the slow clock. lcd/led registers C lcdctrl, ledctrl, lcdout1, lcdout2 the device contains a fully integrated lcd/led driver function which can be setup in various configurations al lowing i t t o cont rol a wi de range of ext ernal lcd and le d panel s. most of these options are controlled using the lcdctrl and ledctrl registers. as some of the lcd segment driving pins can also be setup to be used as cmos outputs, two registers, lcdout1 and lcdout2, are used to select the required function. miscellaneous register ? misc the miscellaneous register is used to control two functions. the four lower bits are used for the watchdog t imer control, while the highest four bits are used to select open drain outputs for pins pa0~pa3.

?

?

? ? ? ? pa0~pa3 open drain control C misc
rev. 1.30 38 ? a ??? ?? ? 013 rev. 1.30 39 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu input/output ports holtek m icrocontrollers of fer c onsiderable fe xibility on t heir i/ o port s. w ith t he i nput or out put designation of every pin fully under user program control, pull-high selections for all ports and wake-up selections on certain pins, the user is provided with an i/o structure to meet the needs of a wide range of application possibilities. the device provides 24 bidirectional input/output lines labeled with port names p a, pb and pd. these i/o ports are mapped to the ram data memory with specific addresses as shown in the spe cial purp ose da ta me mory t able. al l of t hese i/ o po rts c an be use d for i nput a nd ou tput operations. for input operation, these ports are non-latching, which means the inputs must be ready at the t2 ris ing edge of ins truction mov a,[m], where m denotes the port address. for output operation, all the data is latched and remains unchanged until the output latch is rewritten. pull-high resistors many product applications require pull-high resistors for their switch inputs usually requiring the use of an external resistor . t o eliminate the need for these external resistors, all i/o pins, when confgured as an input have the capability of being connected to an internal pull-high resistor . these pull-high resistors are selected using registers p apu, pbpu and pdpu and are implemented using weak pmos transistors.

pull-high resistor register C papu, pbpu, pdpu port a wake-up the h alt ins truction forces the microcontroller into a pow er d own condition w hich pres erves power, a feature that is important for battery and other low-power applications. v arious methods exist to wake-up the microcontroller , one of which is to change the logic condition on one of the port a pi ns fr om hi gh t o l ow. aft er a hal t i nstruction fo rces t he m icrocontroller i nto e ntering a power down condition, the processor will remain in a low-power state until the logic condition of the se lected wa ke-up pi n on port a c hanges from hi gh t o l ow. t his func tion i s e specially sui table for a pplications t hat c an b e wo ken u p v ia e xternal swi tches. e ach p in o n po rt a c an b e se lected individually to have this wake-up feature using the pawu register. port a open drain function all i/o pins in the device have cmos structures, however port a pins p a0~pa3 can also be setup as open drain structures. this is implemented using the ode0~ode3 bits in the misc register.
rev. 1.30 38 ?a??? ?? ?013 rev. 1.30 39 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu i/o port control registers each i/o port has its own control register known as p ac, pbc and pdc, to control the input/output configuration. w ith t his c ontrol re gister, e ach cmos out put or i nput wi th or wi thout pul l-high resistor st ructures c an be re configured dyna mically unde r soft ware c ontrol. e ach pi n of t he i/ o ports is directly mapped to a bit in its associated port control register . for the i/o pin to function as an input, the corresponding bit of the control register must be written as a 1. this will then allow the logic state of the input pin to be directly read by instructions. when the corresponding bit of the control register is written as a 0, the i/o pin will be setup as a cmos output. if the pin is currently setup as an output, instructions can still be used to read the output register . however , it should be noted t hat t he pro gram wi ll i n fa ct onl y re ad t he st atus of t he out put da ta l atch a nd not t he a ctual logic status of the output pin. pin-shared functions the fexibility of the microcontroller range is greatly enhanced by the use of pins that have more than one function. limited numbers of pins can force serious design constraints on designers but by supplying pins with multi-functions , many of these diffculties can be overcome. for some pins, the chosen fu nction o f t he m ulti-function i/ o p ins i s se t b y c onfguration o ptions wh ile f or o thers t he function is set by application program control. ? external interrupt inputs the external interrupt pins int0, int1 are pin-shared with the i/o pins pd4, pd5. for applications not requiring an external interrupt input, the pin-shared external interrupt pin can be used as a normal i/o pin, however to do this, the external interrupt enable bits in the intc0 register must be disabled. ? external t imer clock input the external timer pins tmr0, tmr1 and tmr2 are pin-shared with i/o pins. t o configure them to operate as timer inputs, the corresponding control bits in the timer control register must be correctly set and the pin must also be setup as an input. note that the original i/o function will remain even if the pin is setup to be used as an external timer input. ? pfd output the de vice c ontains a pfd func tion whose si ngle out put i s pi n-shared wi th i/ o pi n p a3. t he output function of this pin is chosen via a confguration option and remains fxed after the device is programmed. note that the corresponding bit of the port control register, pac.3, must setup the pin as an output to enable the pfd output. if the p ac port control register has setup the pin as an input, then the pin will function as a normal logic input with the usual pull-high selection, even if the pfd confguration option has been selected. ? pwm outputs the d evice c ontains se veral pw m o utputs sh ared wi th p ins pd0 ~pd3. t he pw m o utput functions a re c hosen vi a re gisters. not e t hat t he c orresponding bi t of t he port c ontrol re gister, pdc, must setup the pin as an output to enable the pwm output. if the pdc port control register has setup the pin as an input, then the pin will function as a normal logic input with the usual pull-high selection, even if the pwm registers have enabled the pwm function. ? a/d inputs the device contains a multi-channel a/d converter inputs. all of these analog inputs are pin-shared with i/o pins on port b. if these pins are to be used as a/d inputs and not as normal i/o pins then the corresponding bits in the a/d converter control register , adcr, must be properly set. there are no confguration options associated with the a/d function. if used as i/o pins, t hen f ull p ull-high r esistor r egister r emain, h owever i f u sed a s a/ d i nputs t hen a ny p ull-high resistor selections associated with these pins will be automatically disconnected.
rev. 1.30 40 ? a ??? ?? ? 013 rev. 1.30 41 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu i/o pin structures the accompanying diagrams illus trate the internal s tructures of s ome i/o pin types . a s the exact logical constructio n of the i/o pin will dif fer from these drawings, they are supplied as a guide only to assist with the functional understanding of the i/o pins. the wide range of pin-shared structures does not permit all types to be shown.

??? ?? ? ? ? ? generic input/output structure

? ? ?
? ? ? - ? - - ? - ?? ? a/d input/output structure
rev. 1.30 40 ?a??? ?? ?013 rev. 1.30 41 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu programming considerations within the user program, one of the frs t things to consider is port initialisation. after a res et, all of the i/o data and port control registers will be set high. this means that all i/o pins will default to an input stat e, the level of whi ch de pends on the ot her connected circuitry and whe ther pull - high selections have been chosen. if the port control registers, p ac, pbc and pdc, are then programmed to setup some pins as outputs, these output pins will have an initial high output value unless the associated port data registers, p a, pb and pd, are frst programmed. selecting which pins are inputs and which are outputs can be achieved byte-wide by loading the correct values into the appropriate port control register or by programming individual bits in the port control register using the set [m].i and clr [m].i instructions. note that when using these bit control instructions, a read-modify-write operation takes place. the microcontroller must frst read in the data on the entire port, modify it to the required new bit values and then rewrite this data back to the output ports.
read/write timing port a has the additional capability of providing wake-up functions. when the device is in the power down mode, various method s are available to wake the device up. one of these is a high to low transition of any of the port a pins. single or multiple pins on port a can be setup to have this function.
rev. 1.30 4 ? ? a ??? ?? ? 013 rev. 1.30 43 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu lcd and led driver for lar ge volume applications, which incorporate an lcd in their design, the use of a custom display rather than a more expensive character based display reduces costs signifcantly . however , the corresponding com and seg signals required, which vary in both amplitude and time, to drive such a custom display require many special considerations for proper lcd operation to occur . these devices all contain an lcd driver function, which with their internal lcd signal generating circuitry and various options, will automatically generate these time and amplitude varying signals to provide a means of direct driving and easy interfacing to a range of custom lcds. additionally some of the devices also include led driver circuitry which can generated the required signals to drive the com and segment signals for led panels. all devic e include a wide range of options to enable lcd and led displays of various types to be driven. the table shows the range of options available across the device range. part no. duty driver no. bias bias type wave type HT56R62 1/ ? ? 5 ? 1/ ? o ? 1/3 c o ? r a o ? b 1/3 ? 53 1/4 ? 44 ht56r65 1/ ? 41 ? 1/3 413 1/4 404 ht56r642 1/8 ? 48 1/3 ? 1/4 o ? 1/5 r a o ? b 1/1 ? 1 ? 1 ? ht56r644 ht56r654 1/8 408 1/1 ? 3 ? 1 ? ht56r656 1/8 5 ? 8 1/1 ? 481 ? lcd selections note: 1. the HT56R62 and ht56r65 52-pin packages only have r-bias type. 2. the HT56R62 and ht56r65 devices do not have an led driver function. device led duty led driver no. ht56r642 stati ? ? 41 1/4 ? 44 1/8 ? 48 1/1 ? 1 ? 1 ? 1/1 ? 1 ? 1 ? ht56r644 ht56r654 stati ? 401 1/4 404 1/8 408 1/1 ? 3 ? 1 ? 1/1 ? 3 ? 1 ? ht56r656 stati ? 5 ? 1 1/4 5 ? 4 1/8 5 ? 8 1/1 ? 481 ? 1/1 ? 481 ? led selections note: the HT56R62 and ht56r65 devices do not have an led driver function.
rev. 1.30 4? ?a??? ?? ?013 rev. 1.30 43 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu
? ? ? ? ? ? -
? - c type bias voltage levels

r type bias voltage levels C HT56R62/ht56r65
rev. 1.30 44 ? a ??? ?? ? 013 rev. 1.30 45 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu

r type bias voltage levels C ht56r642/ht56r644/ht56r654/ht56r656
rev. 1.30 44 ?a??? ?? ?013 rev. 1.30 45 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu display memory an area of data memory is especially reserved for use for the lcd/led display data. this data area is known as the display memory . any data written here will be automatically read by the internal display driver circuits, which will in turn automatically generate the necessary lcd or led driving signals. therefore any data written into this memory will be immediately refected into the actual display connected to the microcontroller. as the display memory addresses overlap those of the general purpose data memory , it s stored in its own independent bank 1 area. the data memory bank to be used is chosen by using the bank pointer, which is a special function register in the data memory , with the name, bp . t o access the display memory therefore requires frst that bank 1 is selected by writing a value of 01h to the bp register. after this, the memory can then be accessed by using indirect addressing through the use of memory pointer mp1. w ith bank 1 selected, then using mp1 to read or write to the memory area, starting with address 40h, will result in operations to the display memory . directly addressing the display memory is not applicable and will result in a data access to the bank 0 general purpose data memory. the accompanying display memory map diagrams shows how the internal display memory is m apped t o t he se gments a nd com mons of t he di splay for t he l argest de vice, whi ch i s t he ht56r656. display memory maps for devices with smaller memory capacities can be extrapolated from these diagrams. the acco mpanying waveform diagram s show the generated waveforms for a range of duty and bias types. t he h uge n umber o f p ermutations o f a vailable f or t he l cd a nd l ed wa veform t ypes d oes not permit all types to be depicted. ht56r656 memory map C 568
rev. 1.30 4 ? ? a ??? ?? ? 013 rev. 1.30 47 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu ht56r656 memory map C 4816 lcd/led registers control re gisters i n t he da ta me mory, a re use d t o c ontrol t he va rious se tup fe atures of t he lcd/led d river. there is one control regis ter for the lcd function, lcd ctrl, and one for the led function, ledctrl. v arious bits in these registers control functions such as duty type, bias type, bias resist or selection as well as overall lcd enable and disable. the ledsel bit in the ledctrl register must be first setup to determine whether the display is an led or lcd type. programming this bit will determine what other options are available. the lcden bit in the lcdct rl and le den bit i n t he le dctrl register , whic h provi de t he overall lcd/ led enable/disable function, will only be ef fective when the device is in the normal, slow or idle mode. if the device is in the sleep mode then the display will always be disabled. bits rsel0 and rsel1 in the lcdctrl register select the internal bias resistors to supply the lcd panel with the correct bias volta ges. a choice to best matc h the lcd panel used in the applic ation can be selected also to minimise bias current. the type bit in the same register is used to select whether t ype a or t ype b lcd control signals are used. two r egisters, l cdout1 a nd l cdout2 a re u sed t o d etermine i f t he o utput f unction o f d isplay pins seg0~seg23 are used as segment drivers or cmos outputs. if used as cmos outputs then the d isplay m emory is us ed to determine the logic level of the cm os output pins . n ote that as only two bits are used to determine the output function of the seg0~seg7 and seg8~seg15 pins, individual pins from these two groups of pins cannot be chosen to have either a segment or cmos output function. the output function of pins seg16~seg23 can be chosen individually to be either a segment driver or a cmos input.
rev. 1.30 4? ?a??? ?? ?013 rev. 1.30 47 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu

?
? ? ? ? ? ? ? ? ? ? ? ? ? - ? ? ? ?? ?? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ? ? ?? ?? ? ?? ? ? ?- ? ?- ? ?- ? ? ?? ?? ??? ??? lcd control register C lcdctrl for HT56R62/ht56r65

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? ? ? ? ? ?? ? ?? ?? ?? ? ?? ?? ?? lcd control register C lcdctrl for ht56r642/ ht56r644/ ht56r654/ ht56r656
rev. 1.30 48 ? a ??? ?? ? 013 rev. 1.30 49 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu
? ?? ?
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? ? ? ? ? ?? ?? - ?? ? ? ? ? ?? ? ? ? ? ? ?? led control register C ledctrl

?? ? ?

?? ? ? lcd output control register C lcdout1

lcd output control register C lcdout2
rev. 1.30 48 ?a??? ?? ?013 rev. 1.30 49 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu lcd reset function the lcd has an internal reset function that is an or function of the inverted lcden bit in the lcdctrl register and the sleep function. the lcd reset signal is active high. the lcden signal is the inverse of the lcden bit in the lcdctrl register. reset lcd = (sleep mode and lcden) or lcden. lcden=0 and lcden=1 must be enabled to activate the lcdctrl register function. lcden sleep mode reset lcd 0 off 0 on 1 off x 1 on lcd reset function clock source the lcd clock source is the internal clock signal, f sub , divided by 8, using an internal divider circuit. the f sub internal clock is supplied by either the internal 32k_int oscillator or the external 32768hz oscillator , the choice of which is determined by a confguration option. for proper lcd operation, this arrangement is provided to generate an ideal lcd clock source frequency of 4khz. f sub clock source lcd clock frequency internal 32k_int osc. 4khz external 32768hz osc. 4khz lcd clock source lcd driver output when the ledsel bit in the ledctrl register is cleared to zero, the com and seg lines will be setup as lcd driver pins to drive the lcd display. the number of com and seg outputs supplied by the lcd driver , as well as its biasing and duty selections, are dependent upon how the lcd control bits are programm ed. the bias t ype, whether c or r type is selected using a confguration option. if the c-type of bias is used when an internal char ge pump will be enabled. note that the c-type bias is not available on the 52-pin qfp package type. the n ature o f l iquid c rystal di splays r equire t hat o nly a c v oltages c an b e a pplied t o t heir p ixels as the application of dc voltages to lcd pixels may cause permanent damage. for this reason the relative contras t of an lcd display is controlled by the actual rms voltage applied to each pixel, which is equal to the rms value of the voltage on the com pin minus the voltage applied to t he se g p in. t his d ifferential r ms v oltage m ust b e g reater t han t he l cd sa turation v oltage for the pixel to be on and less than the threshold voltage for the pixel to be of f. the requirement to lim it the dc voltage to zero and to control as many pixels as possible with a minimum number of connections, requires that both a time and amplitude signal is generated and applied to the application lcd. these time and amplitude varying signals are automatically generated by the lcd driver circuits in the microcontroller . what is known as the duty determines the number of common lines used, which are also known as backplanes or coms. the duty , which is chosen by a control bit to have a value of 1/2, 1/3, 1/4 etc and which equates to a com number of 2, 3, 4 etc, therefore defnes the number of time divisions within each lcd signal frame. t wo types of signal generation are also provided, known as t ype a and t ype b, the required type is selected via the type bit in the lcdctrl register . t ype b of fers lower frequency signals, however lower frequencies may introduce fickering and infuence display clarity.
rev. 1.30 50 ? a ??? ?? ? 013 rev. 1.30 51 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu led driver output the led driver uses the com and seg lines to drive the led display . the number of com and seg outputs supplied by the led driver , as well as its biasing and duty selections, are dependent upon how the led control bits are programmed. when the ledsel bit in the ledctrl register is set high, the com and seg lines will be setup as cmos output drivers to drive the led display . the com and seg lines can be set to be either active hi gh or a ctive l ow usi ng bi ts i n t he l edctrl re gister. t his provi des 4 di fferent t iming modes. these are com low active, seg low active; com low active, seg high active; com high active, seg low active; com high active, seg high active. the com and seg lines will have a reverse polarity when in the non-active state when the display is of f. for the led driver there are a total of 5 dif ferent duty cycle selections which are static, 14, 18, 1 12 and 1 16. the frame rate of each duty cycle will be between 55hz and 75hz. lcd voltage source and biasing the time and amplitude varying signals generated by the lcd driver function require the generation of several voltage levels for their operation. the number of voltage levels used by the signal depends upon the value of the bias bit in the lcdctrl register . the device can have either r type or c type biasing selected via a confguration option. selecting the c type biasing will enable an internal char ge pump whose multiplier ratio can be selected using an additional confguration option. for r type bi asing an external lcd voltage source must be supplied on pin vlcd1 to generate the internal biasing voltages. this could be the microcontroller power supply or some other voltage source. for the r type 1/2 bias sel ection, three vol tage levels v ss , v a and v b are utilised. the voltage v a is equal to the externally supplied voltage source applied to pin vlcd1. v b is generated internally by the microcontroller and will have a value equal to v lcd1 /2. for the r type 1/3 bias selection, four voltage levels v ss , v a , v b and v c are utilised. the volta ge v a is equal to v lcd1 , v b is equal to v lcd1 2/3 while v c is equal to v lcd1 1/3. in addition to selecting 1/2 or 1/3 bias, several values of bias resistor can be chosen using bits in the lcdctrl register . dif ferent values of internal bias resistors can be selected using the rsel0 and resel1 bits in the lcdctrl register . this along with the voltage on pin vlcd1 will determine the bias current. the connection to the vmax pin depends upon the voltage that is applied to vlcd1. if the v dd voltage is greater than the voltage applied to the vlcd1 pin then the vmax pin should be connected to vdd, otherwise the vmax pin should be connected to pin vlcd1. note that no external capacitors or resistors are required to be connected if r type biasing is used. condition vmax connection v dd > v lcd1 conne ? t v ? ax to vdd ot ? e ? wise conne ? t v ? ax to vlcd1 r type bias current vmax connection
rev. 1.30 50 ?a??? ?? ?013 rev. 1.30 51 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu for c type biasing an external lcd voltage source must also be supplied on pin vlcd1 to generate the internal biasing voltages. the c type biasing scheme uses an internal char ge pump circuit, which in the case of the 1/3 bias selection can generate voltages higher than what is supplied on vlcd1. this feature is useful in applications where the microcontroller supply voltage is less than the supply voltage required by the lcd. an additional char ge pump capacitor must also be connected between pins c1 and c2 to generate the necessary voltage levels. for the c type 1/2 bias selection, three voltage levels v ss , v a and v b are utilised. the voltage v a is generated internal ly and has a value of v lcd1 . v b will have a value equal to v a 0.5. for the c type 1/2 bias confguration v c is not used. for the c type 1/3 bias selection, four voltage levels v ss , v a , v b and v c are utilised. the voltage v a is generated internally and has a value of v lcd1 1.5. v b will have a value equal to v a 2/3 and v c will have a value equal to v a 1/3. the connection to the vmax pin depends upon the bias and the voltage that is applied to vlcd, the details are shown in the table. note that c type biasing is not available on the 52-pin qfp packag e device types. on these package types, pins c1, c2 and v2 are not provided. it is recommended that a 0.1f capacitor is connected between the v1 pin and ground on the 52-pin qfp package types. it is extre mely important to ensure that these char ge pump generated internal voltages do not exceed the maxim um v dd voltage of 5.5v . note that the c-type bias type is not available on the 52-pin qfp package type. biasing type vmax connection 1/3 bias v dd >v lcd1 1.5 conne ? t v ? ax to vdd ot ? e ? wise conne ? t v ? ax to v1 1/ ? bias v dd >v lcd1 conne ? t v ? ax to vdd ot ? e ? wise conne ? t v ? ax to vlcd1 c type biasing vmax connection programming considerations certain pre cautions m ust be t aken whe n progra mming t he l cd/led. one of t hese i s t o e nsure that the display memory is properly initialised after the microcontroller is powered on. like the general purpose data memory , the contents of the display memory are in an unknown condition after power -on. as the contents of the display memory y will be mappe d into the actual display , it is important to initialise this memory area into a known condition soon after applying power to obtain a proper display pattern. consideration must also be given to the capacitive load of the actual lcd used in the application. as t he l oad pre sented t o t he m icrocontroller by l cd pi xels c an be ge nerally m odeled a s m ainly capacitive in nature, it is important that this is not excessive, a point that is particularly true in the case of the com lines which may be connected to many lcd pixels. the accompanying diagram depicts the equivalent circuit of the lcd. one a dditional c onsideration t hat m ust be t aken i nto a ccount i s wha t ha ppens whe n t he microcontroller enters a power down condition. the lcden control bit in the lcdctrl or leden bit in the ledctrl register permits the display to be powered of f to reduce power consumption. if this bit is zero, the driving signals to the display will cease, producing a blank display pattern but reducing any power consumption associated with the lcd. after power -on, note that as the lcden and leden bits will be cleared to zero, the display function will be disabled. the a ccompanying t iming di agrams de pict t he di splay dri ver si gnals ge nerated by t he microcontroller for vari ous val ues of dut y a nd bi as. t he huge range of va rious perm utations onl y permit a few types to be displayed here.
rev. 1.30 5 ? ? a ??? ?? ? 013 rev. 1.30 53 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu lcd panel equivalent circuit led 1/4 duty, com high active, seg low active, display off

led static mode normal operation
rev. 1.30 5? ?a??? ?? ?013 rev. 1.30 53 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu led 1/4 duty, com high active, seg low active, normal operation

note: for 1/2 bias, v a =v lcd1 , v b =v lcd1 1/2 for both r and c type. lcd driver output C type a C 1/2 duty, 1/2 bias
rev. 1.30 54 ? a ??? ?? ? 013 rev. 1.30 55 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu

note: for 1/2 bias, the v a =v lcd1 , v b =v lcd1 1/2 for both r and c type. lcd driver output C type a C 1/3 duty, 1/2 bias
rev. 1.30 54 ?a??? ?? ?013 rev. 1.30 55 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu

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note: for 1/3 r type bias, the v a =v lcd1 , v b =v lcd1 2/3 and v c =v lcd1 1/3. for 1/3 c type bias, the v a =v lcd1 1.5, v b =v lcd1 and v c =v lcd1 1/2. lcd driver output C type a C 1/4 duty, 1/3 bias
rev. 1.30 5 ? ? a ??? ?? ? 013 rev. 1.30 57 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu

note: for 1/3 r type bias, the v a =v lcd1 , v b =v lcd1 2/3 and v c =v lcd1 1/3. for 1/3 c type bias, the v a =v lcd1 1.5, v b =v lcd1 and v c =v lcd1 1/2. lcd driver output C type a - 1/3 duty, 1/3 bias
rev. 1.30 5? ?a??? ?? ?013 rev. 1.30 57 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu note: for 1/2 bias, the v a =v lcd1 , v b =v lcd1 1/2 for both r and c type. lcd driver output C type b C 1/2 duty, 1/2 bias
rev. 1.30 58 ? a ??? ?? ? 013 rev. 1.30 59 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu timer/event counters the p rovision o f t imers f orm a n i mportant p art o f a ny m icrocontroller, g iving t he d esigner a means of carrying out time related functions. the devices contain several 8-bit and 16-bit count- up timers. as each timer has three dif ferent operating modes, they can be confgured to operate as a general timer , an external event counter or as a pulse width measurement device. the provision of a prescaler to the clock circuitry of the 8-bit t imer/event counter also gives added range to this timer. there are two types of registers related to the t imer/event counters. the first are the registers that contain the actual value of the t imer/event counter and into which an initial value can be preloaded. reading from these registers retrieves the contents of the t imer/event counter . the second type of associated register is the t imer control register which defnes the timer options and determines how the t imer/event counter is to be used. the t imer/event counters can have the their clock confgured to come from an internal clock source. in addition, their clock source can also be confgured to come from an external timer pin. confguring the timer/event counter input clock source the internal timer s clock can originate from various sources. the system clock source is used when the t imer/event counter is in the timer mode or in the pulse width measurement mode. for the 8-bit t imer/event counter this internal clock source is f sys which is also divided by a prescaler, the division ratio of which is conditioned by the t imer control register , tmrnc, bits tnpsc0~tnpsc2. for the 16-bit t imer/event counter this internal clock source can be chosen from a combination of internal clocks using a confguration option and the tns bit in the tmrnc register. an e xternal c lock so urce i s u sed wh en t he t imer i s i n t he e vent c ounting m ode, t he c lock so urce being provided on an external timer pin tmr0, tmr1 or tmr2 depending upon which timer is used. depending upon the condition of the tne bit, each high to low , or low to high transition on the external timer pin will increment the counter by one. device HT56R62 ht56r642/ht56r644 ht56r65/ht56r654/ht56r656 no. of 8-bit timers ? 1 ? timer name time ? /event counte ? 0 time ? /event counte ? 1 time ? /event counte ? 0 time ? /event counte ? 0 time ? /event counte ?? timer register name t ? r0 t ? r1 t ? r0 t ? r0 t ? r ? control register name t ? r0c t ? r1c t ? r0c t ? r0c t ? r ? c no. of 16-bit timers 0 1 1 timer name time ? /event counte ? 1 time ? /event counte ? 1 timer register name tmr1l/tmr1h tmr1l/tmr1h control register name t ? r1c t ? r1c
rev. 1.30 58 ?a??? ?? ?013 rev. 1.30 59 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu timer registers ? tmr0, tmr1, tmr1l/tmr1h, tmr2 the timer registers are special function registers located in the special purpose data memory and is the place where the actual timer value is stored. for the 8-bit t imer/event counters, these registers are know n as tm r0, tm r1 or tm r2. for the 16-bit t imer/event counter , a pair of registers are required and are known as tmr1l/tmr1h. the value in the timer registers increases by one each time an internal clock pulse is received or an external transition occurs on the external timer pin. the timer will count from the initial value loaded by the preload register to the full count of ffh for the 8-bit timer or ffffh for the 16-bit timer at which point the timer overfows and an internal interrupt signal is generated. the timer value will then be reset with the initial preload register value and continue counting. to achieve a maximum full range count of ffh for the 8-bit timer or ffffh for the 16-bit timer , the preload registers must frst be cleared to all zeros. it should be noted that after power -on, the preload register will be in an unknown condition. note that if the t imer/event counter is switched off and data is written to its preload registers, this data will be immediately written into the actual timer registers. however , if the t imer/event counter is enabled and counting, any new data written into the preload data registers during this period will remain in the preload registers and will only be written into the timer registers the next time an overfow occurs. for the 16-bit t imer/event counter which has both low byte and high byte timer registers, accessing these registers is carried out in a specifc way . it must be noted when using instructions to preload data into the low byte timer register, the data will only be placed in a low byte buffer and not directly into the low byte timer register. the actual transfer of the data into the low byte timer register is only carried out when a write to its associated high byte timer register , namely tmr1h, is executed. on the other hand, using instructions to preload data into the high byte timer register will result in the data being directly written to the high byte timer register . at the same time the data in the low byte buffer will be trans ferred into its ass ociated low byte timer regis ter. for this reason, the low byte timer register should be written frst when preloading data into the 16-bit timer registers. it must also be noted that to read the contents of the low byte timer register , a read to the high byte timer register must be executed frst to latch the contents of the low byte timer registe r into its associated low byte buffer. after this has been done, the low byte timer register can be read in the normal way . note that reading the low byte timer register will result in reading the previously latched contents of the low byte buffer and not the actual contents of the low byte timer register.
rev. 1.30 ? 0 ? a ??? ?? ? 013 rev. 1.30 ?1 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu timer control registers ? tmr0c, tmr1c, tmr2c the fexible features of the holtek microcontroller t imer/event counters enable them to operate in three different modes, the options of which are determined by the contents of their respective control register. it is the t imer control regis ter together w ith its corres ponding timer regis ters that control the full o peration o f t he t imer/event c ounters. b efore t he t imers c an b e u sed, i t i s e ssential t hat t he appropriate t imer control register is fully programmed with the right data to ensure its correct operation, a process that is normally carried out during program initialisation. to c hoose wh ich o f t he t hree m odes t he t imer i s t o o perate i n, e ither i n t he t imer m ode, t he e vent counting mode or the pulse width measurement mode, bits 7 and 6 of the corresponding t imer control register , which are known as the bit pair tnm1/tnm0, must be set to the required logic levels. the timer -on bit, which is bit 4 of the t imer control register and known as tnon, depending upon which timer is used, provides the basic on/of f control of the respective timer . setting the bit high allows the counter to run, clearing the bit stops the counter . for timers that have prescalers, bits 0~2 of the t imer control register determine the division ratio of the input clock prescaler. the prescaler bit settings have no ef fect if an external clock source is used. if the timer is in the event count or pulse width measurement mode, the active transition edge level type is selected by the logic level of bit 3 of the t imer control register which is known as tne. an additional tns bit in the 16-bit t imer/event counter control register is used to determine the clock source for the timer/event counter.
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8-bit timer/event counter structure

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16-bit timer/event counter structure
rev. 1.30 ?0 ?a??? ?? ?013 rev. 1.30 ? 1 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu
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timer/event counter control register C tmrnc

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? ?-? ? ????? ? ??? ? ? ?? ? ?? ? timer/event counter control register C tmrnc
rev. 1.30 ?? ? a ??? ?? ? 013 rev. 1.30 ?3 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu confguring the timer mode in this mode, the t imer/event counter can be utilised to measure fxed time intervals, providing an internal interru pt signal each time the t imer/event counter overfows. t o operate in this mode, the operating mode select bit pair , tnm1/tnm0, in the t imer control register must be set to the correct value as shown. bit7 bit6 1 0 control register operating mode select bits for the timer mode
timer mode timing chart in this mode the internal clock, f sys , is used as the internal clock for 8-bit t imer/event counter 0 and f sub or f sys /4 is used as the inte rnal clock for 16-bit t imer/event counter 1. however , the clock source, f sys , for the 8-bit timer is further divide d by a prescaler , the value of which is determined by the prescaler rate select bits tnpsc2~tnpsc0, which are bits 2~0 in the t imer control register . after the other bits in the t imer control register have been setup, the enable bit tnon or tnon, which is bit 4 of the t imer control register , can be set high to enable the t imer/event counter to run. each time an internal clock cycle occurs, the t imer/event counter increments by one. when it is full and overfows, an interrupt signal is generated and the t imer/event counter will reload the value alre ady loaded into the preload register and continue counting. the interrupt can be disabled by ensuring that the t imer/event counter interrupt enable bit in the corresponding interrupt control register, is reset to zero.
rev. 1.30 ?? ?a??? ?? ?013 rev. 1.30 ? 3 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu confguring the event counter mode in this mode, a number of externally changing logic events, occurring on the external timer pin, can be recorded by the t imer/event counter . t o operate in this mode, the o perating m ode s elect bit pair, tnm1/tnm0, in the t imer control register must be set to the correct value as shown. bit7 bit6 0 1 control register operating mode select bits for the event counter mode
event counter mode timing chart in this mode, the external timer pin, is used as the t imer/event counter clock source, however it is not divided by the internal prescaler . after the other bits in the t imer control register have been setup, the enable bit tnon, which is bit 4 of the t imer control register , can be set high to enable the timer/event counter to run. if the active edge select bit, tne, which is bit 3 of the t imer control register, is low , the t imer/event counter will increment each time the external timer pin receives a low to high transition. if the a ctive edge s elect bit is high, the counter w ill increment each time the external timer pin receives a high to low transition. when it is full and overfows, an interrupt signal is generated and the t imer/event counter will reload the value already loaded into the preload register and continue counting. the interrupt can be disabled by ensuring that the t imer/event counter interrupt enable bit in the corresponding interrupt control register, is reset to zero. as the external tim er pin is shared with an i/o pin, to ensure that the pin is confgured to operate as an event counter input pin, two things have to happen. the frst is to ensure that the operating mode select bit s in the t imer cont rol register pla ce t he t imer/event count er in t he event count ing mode, the second is to ensure that the port control register confgures the pin as an input. it should be noted that in the event counting mode, even if the microcontroller is in the power down mode, the t imer/event counter will continue to record externally changing logic events on the timer input pin. as a result when the timer overfows it will generate a timer interr upt and corresponding wake- up source.
rev. 1.30 ? 4 ? a ??? ?? ? 013 rev. 1.30 ?5 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu confguring the pulse width measurement mode in this mode, the t imer/event counter can be utilised to measure the width of external pulses applied to the external timer pin. t o operate in this mode, the operating mode select bit pair , tnm1/tnm0, in the t imer control register must be set to the correct value as shown. bit7 bit6 1 1 control register operating mode select bits for the pulse width measurement mode

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? ? ? ? -?-?? ? pulse width measure mode timing chart in this mode the internal clock, f sys , is used as the internal clock for the 8-bit t imer/event counter and f sub or f sys /4 is used as the internal clock for the 16-bit t imer/event counter. however, the clock source, f sys , for the 8-bit timer is further divide d by a prescaler , the value of which is determined by the prescaler rate select bits tnpsc2~tnpsc0, which are bits 2~0 in the t imer control register . after the other bits in the t imer control register have been setup, the enable bit tnon, which is bit 4 of the t imer control register , can be set high to enable the t imer/event counter , however it will not actually start counting until an active edge is received on the external timer pin. if the active edge select bit tne, which is bit 3 of the t imer control register , is low , once a high to l ow t ransition ha s be en re ceived on t he e xternal t imer pi n, t he t imer/event count er wi ll st art counting until the external timer pin returns to its original high level. at this point the enable bit will be automatically reset to zero and the t imer/event counter will stop counting. if the active edge select bi t is high, the t imer/event counter will begin counting once a low to hi gh transit ion has been rece ived on the external timer pin and stop counting when the external timer pin returns to its original low level . as before, the enable bit will be automatically reset to zero and the t imer/event counter will stop counting. it is important to note that in the pulse w idth measurement mode, the enable b it i s a utomatically r eset t o z ero wh en t he e xternal c ontrol si gnal o n t he e xternal t imer p in returns to its original level, whereas in the other two modes the enable bit can only be reset to zero under program control. the residual value in the t imer/event counter , which can now be read by the program, therefore represents the length of the pulse received on the external timer pin. as the enable bit has now been reset, any further trans itions on the external timer pin w ill be ignored. n ot until the enable bit is again se t hi gh by t he pro gram c an t he t imer be gin fur ther pul se wi dth m easurements. in t his wa y, single shot pulse measurements can be easily made. it should be noted that in this mode the t imer/event counter is controlled by logical transitions on t he e xternal t imer p in a nd n ot b y t he l ogic l evel. w hen t he t imer/event c ounter i s f ull a nd overfows, an interrupt signal is generated and the t imer/event counter will reload the value already loaded into the preload register and continue counting. the interrupt can be disabled by ensuring that the t imer/event counter interrupt enable bit in the corresponding interrupt control register , is reset to zero. as the external timer pin is shared with an i/o pin, to ensure that the pin is confgured to operate as a pulse width measurement pin, two things have to happen. the frst is to ensure that the operating mode s elect bits in the t imer control regis ter place the t imer/event counter in the p ulse w idth measurement mode, the second is to ensure that the port control register confgures the pin as an input.
rev. 1.30 ?4 ?a??? ?? ?013 rev. 1.30 ? 5 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu programmable frequency divider ? pfd the programmable frequency divider provides a means of producing a variable frequency output suitable for applications requiring a precise frequency generator. the pfd output is pin-shared with the i/o pin p a3. the pfd function is selected via confguration option, however, if not selected, the pin can operate as a normal i/o pin. the clock source for the pfd circuit can originate from either t imer/event counter 0 or timer/event counter 1 overfow signal selected via confguration option. the output frequency is controlled by loading the required values into the timer registers and prescaler registers to give the required division ratio. the timer will begin to count-up from this preload register value until full, at which point an overfow signal is generated, causing the pfd output to change state. the timer will then be automatically reloaded with the preload register value and continue counting-up. for the pfd output to function, it is essential that the corresponding bit of the port a control register pac bit 3 is setup as an output. if setup as an input the pfd output will not function, however , the pin can still be used as a normal input pin. the pfd output will only be activated if bit p a3 is set to 1. this output data bit is used as the on/of f control bit for the pfd output. note that the pfd output will be low if the pa3 output data bit is cleared to 0. using this method of frequency generation, and if a crystal oscillator is used for the system clock, very precise values of frequency can be generated.

pfd output control prescaler bits t npsc0~tnpsc2 of t he c ontrol re gister c an be use d t o de fine t he pre -scaling st ages of t he internal clock source of the t imer/event counter . the t imer/event counter overfow signal can be used to generate signals for the pfd and t imer interrupt. i/o interfacing the t imer/event counter , when confgured to run in the event counter or pulse width measurement mode, require the use of external pins for correct operation. as these pins are shared pins they must be confgured correctly to ensure they are setup for use as t imer/event counter inputs and not as a normal i/o pins. this is implemented by ensuring that the mode select bits in the t imer/event counter c ontrol r egister, se lect e ither t he e vent c ounter o r p ulse wi dth m easurement m ode. additionally the port control register must be set high to ensure that the pin is setup as an input. any pul l-high re sistor on t hese pi ns wi ll re main va lid e ven i f t he pi n i s use d a s a t imer/event counter input.
rev. 1.30 ?? ? a ??? ?? ? 013 rev. 1.30 ?7 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu timer/event counter pins internal filter the external t imer/event counter pins are connected to an internal flter to reduce the possibility of unwanted event counting events or inaccurate pulse width measurements due to adverse noise or spikes on the exte rnal t imer/event counter input signal. as this internal flter circuit will consume a limited amount of power , a confguration option is provided to switch of f the flter function, an option whi ch m ay be be nefcial i n powe r se nsitive a pplications, but i n whi ch t he i ntegrity of t he input signal is high. care must be taken when using the flter on/of f confguration option as it will be applie d not only to both external t imer/event counter pins but also to the external interrupt input pins. individual t imer/event counter or external interrupt pins cannot be selected to have a flter on/off function. programming considerations when c onfigured t o run i n t he t imer m ode, t he i nternal syst em c lock i s use d a s t he t imer c lock source and is therefore synchronised with the overall operation of the microcontroller . in this mode when the appropriate timer register is full, the microcontroller will generate an internal interrupt signal directing the program flow to the respective internal interrupt vector . for the pulse width measurement mode, the internal system clock is also used as the timer clock source but the timer will only run when the correct logic condition appears on the external timer input pin. as this is an external event and not synchronized with the internal timer clock, the microcontroller will only see this external event when the next timer clock pulse arrives. as a result, there may be small differences in measured values requiring programmers to take this into account during programming. the same applies if the timer is configured to be in the event counting mode, which again is an external event and not synchronised with the internal system or timer clock. when t he t imer/event c ounter i s r ead, o r i f d ata i s wr itten t o t he p reload r egister, t he c lock i s inhibited to avoid errors, however as this may result in a counting error , this should be taken into account by t he progra mmer. ca re m ust be t aken t o e nsure t hat t he t imers a re prope rly i nitialised before using them for the first time. the associated timer enable bits in the interrupt control register must be properly set otherwise the internal interrupt associated with the timer will remain inactive. t he e dge se lect, t imer m ode a nd c lock so urce c ontrol b its i n t imer c ontrol r egister m ust also be c orrectly se t t o e nsure t he t imer i s prope rly c onfigured for t he re quired a pplication. it i s also important to ensure that an initial value is frst loaded into the timer registers before the timer is switched on; this is because after power -on the initial values of the timer registers are unknown. after the timer has been initialised the timer can be turned on and of f by controlling the enable bit in the timer control register . note that setting the timer enable bit high to turn the timer on, should only be executed after the timer mode bits have been properly setup. setting the timer enable bit high together with a mode bit modifcation, may lead to improper timer operation if executed as a single timer control register byte write instruction. when the t imer/event counter overfows, its corresponding interrupt request fag in the interrupt control r egister wi ll b e se t. i f t he t imer i nterrupt i s e nabled t his wi ll i n t urn g enerate a n i nterrupt signal. however irrespective of whether the interrupts are enabled or not, a t imer/event counter overflow will also generate a wake-up signal if the device is in a power -down condition. this situation may occur if the t imer/event counter is in the event counting mode and if the external signal continues to change state. in such a case, the t imer/event counter will continue to count these external events and if an overfow occurs the device will be woken up from its power -down condition. t o prevent such a wake-up from occurring, the timer interru pt request fag should frst be set high before issuing the halt instruction to enter the power down mode.
rev. 1.30 ?? ?a??? ?? ?013 rev. 1.30 ? 7 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu timer program example this program example shows how the t imer/event counter registers are setup, along with how the interrupts are enabled and managed . note how the t imer/event counter is turned on, by setting bit 4 of the t imer control register . the t imer/event counter can be turned of f in a similar way by clearing the same bit. this example program sets the t imer/event counter to be in the timer mode, which uses the internal system clock as the clock source. org 04h ; external interrupt vector reti org 08h ; t imer/event c ounter 0 i nterrupt v ector jmp t mrint ; j ump h ere w hen th e t imer/event c ounter 0 o verfows : org 2 0h ; m ain p rogram i nternal t imer/event c ounter 0 i nterrupt ro utine tmrint: : ; t imer/event c ounter 0 m ain p rogram p laced h ere : reti : : begin: ; se tup ti mer 0 r egisters mov a ,09bh ; se tup ti mer 0 p reload v alue mov tmr0,a; mov a ,081h ; s etup t imer 0 c ontrol r egister mov tmr0c,a ; timer m ode a nd p rescaler s et to / 2 s etup i nterrupt r egister mov a,009h ; enable master interrupt and timer interrupt mov int0c,a set t mr0c.4 ; s tart t imer/event c ounter 0 - n ote m ode b its m ust b e p reviously s etup
rev. 1.30 ? 8 ? a ??? ?? ? 013 rev. 1.30 ?9 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu pulse width modulator the devices contains a series of pulse w idth modulation, pwm, outputs. useful for such applications such as motor speed control, the pwm function provides an output with a fixed frequency but with a duty cycle that can be varied by setting particular values into the corresponding pwm register. part no. channels pwm mode output pin register names HT56R62 3 8+4 pd0~pd ? pw ? 0l~pw ?? l pwm0h~pwm2h ot ? e ? devi ? es 4 8+4 pd0~pd3 pw ? 0l~pw ? 3l pwm0h~pwm3h pwm overview a registe r pair , located in the data memory is assigned to each pulse w idth modulator output and are k nown a s t he pw m r egisters. i t i s i n e ach r egister p air t hat t he 1 2-bit v alue, wh ich r epresents the overall duty cycle of one modulation cycle of the output waveform, should be placed. the pwm regis ters als o contain the enable/dis able control bit for the p wm outputs . t o increas e the pwm modulation frequency , each modulation cycle is modulated into sixteen individual modulation sub-sections, known as the 8+4 mode. note that it is only necessary to write the required modulation value into the corresponding pwm register as the subdivision of the waveform into its sub-modulation cycles is implemented automatically within the microcontroller hardware. the pwm clock source is the system clock f sys . this method of dividing the original modulation cycle into a further 16 s ub-cycles enables the generation of higher pwm frequencies, which allow a wider range of applications to be served. as long as the periods of the generated pwm pulses are less than the time constants of the load, the pwm output w ill be suitable as such long time constant loads w ill average out the pulses of the pwm output. the dif ference between what is known as the pwm cycle frequency and the pwm modulation frequency should be understood. as the pwm clock is the system clock, f sys , and as the pwm va lue i s 12-bi t wi de, t he ove rall pw m c ycle freque ncy i s f sys /4096. howe ver, whe n i n t he 8+4 mode of operation, the pwm modulation frequency will be f sys /256. pwm modulation frequency pwm cycle frequency pwm cycle duty f sys / ? 5 ? f sys /409 ? (pw ? ? egiste ? value)/409 ?
rev. 1.30 ?8 ?a??? ?? ?013 rev. 1.30 ? 9 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu 8+4 pwm mode modulation each full pwm cycle, as it is 12-bit wide, has 4096 clock periods. however , in the 8+4 pwm mode, each pwm cycle is subdivided into sixteen individual sub-cycle s known as modulation cycle 0~modulation cycle 15, denoted as i in the table. each one of thes e sixteen sub-cycles contains 256 clock cycles. in this mode, a modulation frequency increase of sixteen is achieved. the 12-bit pwm regis ter value, w hich repres ents the overall duty cycle of the p wm w aveform, is divided into two groups. the frst group which consists of bit4~bit1 1 is denoted here as the dc value. the second group which consists of bit0~bit3 is known as the ac value. in the 8+4 pwm mode, the duty cycle value of each of the two modulation sub-cycles is shown in the following table. parameter ac (0~15) dc (duty cycle) ? odulation ? y ? le i (i=0~15) i ? 8+4 pwm mode
rev. 1.30 70 ? a ??? ?? ? 013 rev. 1.30 71 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu

?? ? ? ? ? ? ? - ? ??? ?? ? ? ?? ? ? ? ? ?? ? ? ? ?? ?? ? ? pwm register pairs pwm programming example the following sample program shows how the pwm output is setup and controlled. mov a ,64h ; s etup p wm0 va lue t o 1 600 d ecimal w hich is 6 40h mov p wm0h,a ; s etup p wm0h re gister v alue clr p wm0l ; s etup p wm0l r egister v alue clr p dc.0 ; s etup p in p d0 a s an ou tput set p wm0en ; s et the pw m0 e nable b it set p d.0 ; e nable th e p wm0 ou tput : : : : clr p d.0 ; p wm0 ou tput d isabled ? p d0 w ill r emain l ow
rev. 1.30 70 ?a??? ?? ?013 rev. 1.30 71 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu analog to digital converter the need to interface to real world analog signals is a common requirement for many electronic systems. however , to properly process these signals by a microcontroller , they must first be converted into digital signals by a/d converters. by integrating the a/d conversion electronic circuitry into the microcontroller , the need for external components is reduced signifcantly with the corresponding follow-on benefts of lower costs and reduced component space requirements.

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? ? ? ?? ? ? ? - ? ? ??? ? ? ? ? ? a/d converter structure a/d overview the device contains an 8-channel analog to digital converter which can directly interface to external analog signals, such as that from sensors or other control signals and convert these signals directly into either a 12-bit digital value. part no. input channels conversion bits input pins HT56R62 ? 1 ? pb0~pb5 ot ? e ? devi ? es 8 1 ? pb0~pb7 the accompanying block diagram shows the overall internal structure of the a/d converter , together with its associated registers. a/d converter data registers ? adrl, adrh the de vice, whi ch ha s a n i nternal 12 -bit a/ d c onverter, re quires t wo da ta re gisters, a hi gh by te register, kn own a s adrh, a nd a l ow by te r egister, k nown a s adrl . aft er t he c onversion pr ocess takes place, these registers can be directly read by the microcontroller to obtain the digitised conversion va lue. on ly t he hi gh by te re gister, adr h, ut ilises i ts ful l 8-b it c ontents. t he l ow byte register utilis es only 4 bit of its 8-bit contents as it contains only the lowest bits of the 12-bit converted value. in the following table, d0~d11 is the a/d conversion data result bits. register bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 adrl d3 d ? d1 d0 adrh d11 d10 d9 d8 d7 d ? d5 d4 a/d data registers
rev. 1.30 7 ? ? a ??? ?? ? 013 rev. 1.30 73 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu a/d converter control registers ? adcr, acsr to control the function and operati on of the a/d converter , two control registers known as adcr and acsr are provided. these 8-bit registers define functions such as the selection of which analog channel is connected to the internal a/d converter , which pins are used as analog inputs and which a re u sed a s n ormal i /os, t he a/ d c lock so urce a s we ll a s c ontrolling t he st art f unction a nd monitoring the a/d converter end of conversion status. the acs2~acs0 bits in the adcr register defne the channel number . as the device contains only one actua l analog to digital converter circuit, each of the individual 8 analog inputs must be routed to the converter . it is the function of the acs2~acs0 bits in the adcr register to determine which analog channel is actually connected to the internal a/d converter. the adcr control register also contains the pcr2~pcr0 bits which determine which pins on port b are used as anal og inputs for the a/d converter and which pins are to be used as normal i/o pins. if the 3-bit address on pcr2~pcr0 has a value of 111, then all eight pins, namely an0~an7 will all be set as analog inputs. note that if the pcr2~pcr0 bits are all set to zero, then all the port b pins will be setup as normal i/os and the internal a/d converter circuitry will be powered of f to reduce the power consumption.

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? ? ? ? ? ? ? ? ? ? - ? ? ? ? ? ? ?
? ? ? ? ? ? ? ? ? ? ? - ? ? ? - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? a/d converter control register C adcr
rev. 1.30 7? ?a??? ?? ?013 rev. 1.30 73 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu
? ? ? ? ? ? ?? ? ? - ?? ? ? ? ? ? ? a/d converter control register C acsr the st art bit in the register is used to start and reset the a/d convert er. when the microcontroller sets t his b it f rom l ow t o h igh a nd t hen l ow a gain, a n a nalog t o d igital c onversion c ycle wi ll b e initiated. when the st art bit is brought from low to high but not low again, the eocb bit in the adcr register will be set to a 1 and the analog to digital converter will be reset. it is the st art bit that is used to control the overall on/off operation of the internal analog to digital converter. the eocb bit in the adcr register is used to indicate when the analog to digital conversion process is comple te. this bit will be automatically set to 0 by the microcontroller after a conversion cycle has ended. in addition, the corresponding a/d int errupt request flag will be set in the interrupt control register , and if the interrupts are enabled, an appropriate internal interrupt signal will be generated. this a/d internal interrupt signal will direct the program flow to the associated a/d internal interrupt address for processing. if the a/d internal interrupt is disabled, the microcontroller can be used to poll the eocb bit in the adcr register to check whether it has been cleared as an alternative method of detecting the end of an a/d conversion cycle. the clock source for the a/d converter , which originates from the system clock f sys , is frst divided by a division ratio , the value of which is determined by the adcs2, adcs1 and adcs0 bits in the acsr register. controlling the on/of f function of the a/d converter circuitry is implemented using the adonb bit in the acsr register and the value of the pcr bits in the adcr registe r. both the adonb bit must cleared to 0 and the value of the pcr bits must have a non-zero value for the a/d converter to be enabled. pcr adonb a/d 0 x off > 0 0 on > 0 1 off
rev. 1.30 74 ? a ??? ?? ? 013 rev. 1.30 75 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu although the a/d clock source is determined by the system clock f sys , and by bits adcs2, adcs1 and adcs0, there are some limitations on the maximum a/d clock source speed that can be se lected. as t he m inimum v alue o f p ermissible a/ d c lock p eriod, t ad , i s 0 .5s, c are m ust b e taken for system clock speeds in excess of 4mhz. for system clock speeds in excess of 4mhz, the adcs2, adcs1 and adcs0 bits should not be set to 000. doing so will give a/d clock periods that are less than the minimum a/d clock period whi ch may result in inaccurate a/d conversion values. refer to the following table for examples, where values marked with an asterisk * show where, depending upon the device, s pecial care mus t be taken, as the values may be less than the specifed minimum a/d clock period. f sys a/d clock period (t ad ) adcs2, adcs1, adcs0=000 (f sys /2) adcs2, adcs1, adcs0=001 (f sys /8) adcs2, adcs1, adcs0=010 (f sys /32) adcs2, adcs1, adcs0=011 1mhz ? s 8s 3 ? s undefned 2mhz 1s 4s 1 ? s undefned 4mhz 500ns ? s 8s undefned 8mhz ? 50ns* 1s 4s undefned 12mhz 1 ? 7ns* ?? 7ns ? . ? 7s undefned a/d clock period examples a/d input pins all of the a/d analog input pins are pin-shared with the i/o pins on port b. bits pcr2~pcr0 in the adcr r egister, d etermine wh ether t he i nput p ins a re se tup a s n ormal po rt b i nput/output p ins o r whether they are setup as analog inputs. in this way , pins can be changed under program control to change their function from normal i/o operation to analog inputs and vice versa. pull-high resistors, which are setup through register programming, apply to the input pins only when they are used as normal i /o p ins, i f se tup a s a/ d i nputs t he p ull-high r esistors wi ll b e a utomatically d isconnected. note that it is not necessary to frst setup the a/d pin as an input in the pbc port control register to enable the a/d input as when the pcr2~pcr0 bits enable an a/d input, the status of the port control re gister wi ll be ove rridden. t he a/ d c onverter ha s i ts own powe r supp ly pi ns a vdd a nd avss and a vref reference pin. the analog input values must not be allowed to exceed the value of vref . initialising the a/d converter the inter nal a/d converter must be initialised in a special way . each time the port b a/d channel selection bi ts a re m odified by t he prog ram, t he a/ d c onverter m ust be re -initialised. if t he a/ d converter is not initialised after the channel selection bits are changed, the eocb fag may have an undefned value, which may produce a false end of conversion signal. t o initialise the a/d converter after the channel selection bits have changed, then, within a time frame of one to ten instruction cycles, the st art bit in the adcr register must frst be set high and then immediately cleared to zero. this will ensure that the eocb fag is correctly set to a high condition.
rev. 1.30 74 ?a??? ?? ?013 rev. 1.30 75 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu summary of a/d conversion steps the following summarises the individual steps that should be executed in order to implement an a/d conversion process. ? step 1 select the required a/d conversion clock by correctly programming bits adcs2, adcs1 and adcs0 in the acsr register. ? step 2 enable the a/d by clearing the adonb in the acsr register to zero. ? step 3 select which channel is to be connected to the internal a/d converter by correctly programming the acs2~acs0 bits which are also contained in the adcr register. ? step 4 select which pins on port b are to be used as a/d inputs and confgure them as a/d input pins by correctly programming the pcr2~pcr0 bits in the adcr register . note that this step can be combined with step 2 into a single adcr register programming operation. ? step 5 if the interrupts are to be used, the interrupt control registers must be correctly configured to ensure the a/d converter interrupt function is active. the master interru pt control bit, emi, in the intc0 interrupt control register must be set to 1, the multi-function interrupt enable bit, emfi, in the intc1 register and the a/d converter interrupt bit, eadi, in the intc1 register must also be set to 1. ? step 6 the analog to digital conversion process can now be initialised by setting the st art bit in the adcr register from 0 to 1 and then to 0 again. note that this bit should have been originally set to 0. ? step 7 to check when the analog to digital conversion process is complete, the eocb bit in the adcr register ca n be poll ed. the conversion proc ess is com plete when thi s bit goes l ow. when thi s occurs the a/d data registers adrl and adrh can be read to obtain the conversion value. as an alternative method if the interrupts are enabled and the stack is not full, the program can wait for an a/d interrupt to occur. note: when checking for the end of the conversion process, if the met hod of polling the eocb bit in the adcr register is used, the interrupt enable step above can be omitted. the accompanying diagram shows graphically the various stages involved in an analog to digital conversion process and its associated timing. the setting up and operation of the a/d converter function is fully under the control of the application program as there are no confguration options associated with the a/d converter. after an a/d conversion process has been initiated by the application program, the microcontroller internal hardware will begin to carry out the conversion, during which time the program can continue with other functions. the time taken for the a/d conversion is 16t ad where t ad is equal to the a/d clock period.
rev. 1.30 7 ? ? a ??? ?? ? 013 rev. 1.30 77 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu

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rev. 1.30 7? ?a??? ?? ?013 rev. 1.30 77 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu a/d programming example the following two programming examples illustrate how to setup and implement an a/d conversion. in the frst example, the method of polling the eocb bit in the adcr register is used to detect when the conversion cycle is complete, whereas in the second example, the a/d interrupt is used to determine when the conversion is complete. example: using an eocb polling method to detect the end of conversion clr eadi ; d isable a dc i nterrupt mov a,00000001b mov acsr,a ; s elect f sys /8 a s a /d cl ock a nd t urn o n a donb bi t mov a,00100000b ; s etup a dcr r egister t o c onfgure p ort p b0~pb3 a s a /d i nputs mov adcr,a ; a nd s elect a n0 t o b e c onnected t o t he a /d c onverter : : ; as th e p ort b c hannel b its h ave c hanged th e f ollowing ; s tart s ignal ( 0-1-0) m ust b e i ssued i nstruction c ycles : start_conversion: clr start set start ; r eset a /d clr start ; s tart a /d polling_eoc: sz eocb ; p oll t he a dcr r egister e ocb b it t o d etect e nd ; o f a /d c onversion jmp polling_eoc ; c ontinue p olling mov a,adrl ; re ad l ow b yte c onversion re sult v alue mov adrl_buffer,a ; s ave r esult t o us er d efned r egister mov a,adrh ; re ad h igh b yte c onversion re sult v alue mov adrh_buffer,a ; s ave r esult t o us er d efned r egister : jmp start_conversion ; s tart n ext a/ d c onversion
rev. 1.30 78 ? a ??? ?? ? 013 rev. 1.30 79 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu example: using the interrupt method to detect the end of conversion clr eadi ; d isable a dc i nterrupt mov a,00000001b mov acsr,a ; s elect f sys /8 a s a /d cl ock a nd t urn o n a donb bi t mov a,00100000b ; s etup a dcr r egister t o c onfgure p ort p b0~pb3 a s a /d i nputs mov adcr,a ; an d s elect a n0 t o b e c onnected t o th e a /d : ; as th e p ort b c hannel b its h ave c hanged th e ; f ollowing s tart s ignal(0-1-0) m ust b e i ssued : start_conversion: clr start set start ; r eset a /d clr start ; s tart a /d clr adf ; c lear a dc i nterrupt re quest f ag set eadi ; e nable a dc i nterrupt set emfi ; e nable m ulti-function i nterrupt set emi ; e nable gl obal i nterrupt : : : ; a dc i nterrupt s ervice r outine adc_: mov acc_stack,a ; s ave a cc t o u ser d efned m emory a,status mov status_stack,a ; s ave st atus t o us er d efned m emory : : mov a,adrl ; re ad l ow b yte c onversion re sult v alue mov adrl_buffer,a ; s ave r esult t o us er d efned r egister mov a,adrh ; re ad h igh b yte c onversion re sult v alue mov adrh_buffer,a ; s ave r esult t o us er d efned r egister : : exit__isr: mov a,status_stack mov status,a ; restore s tatus f rom u ser d efned m emory mov a,acc_stack ; r estore a cc fr om u ser d efned m emory clr adf ; c lear a dc i nterrupt f ag reti
rev. 1.30 78 ?a??? ?? ?013 rev. 1.30 79 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu a/d transfer function as the device contain a 12-bit a/d converter , its full-scale converted digitised value is equal to fffh. since the full-s cale analog input value is equal to the v dd voltage, this gives a single bit analog input value of v dd /4096. the diagram show the ideal transfer function between the analog input value and the digitised output value for the a/d converter. note that to reduce the quantisation error , a 0.5 lsb of fset is added to the a/d converter input. except for the digitised zero value, the subsequent digitised values will change at a point 0.5 lsb below where they would change without the of fset, and the last full scale digitised value will change at a point 1.5 lsb below the v dd level.

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rev. 1.30 80 ? a ??? ?? ? 013 rev. 1.30 81 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu serial interface function the device contai ns a serial interface function, which includes both the four line spi interface and the two line i 2 c interface types, to allow an easy method of communication with external peripheral hardware. ha ving re latively si mple c ommunication prot ocols, t hese se rial i nterface t ypes a llow the microcontroller to interface to external spi or i 2 c based hardware such as sensors, flash or eeprom memory , etc. the sim interface pins are pin-shared with other i/o pins therefore the sim interface function must frst be selected using a confguration option. as both interface types share the same pins and registers, the choice of whether the spi or i 2 c type is used is made using a bit in an internal register. spi interface the spi interface is often used to communicate with external peripheral devices such as sensors, flash or eeprom memory devices etc. originally developed by motorola, the four line spi interface is a synchronous serial data interface that has a relatively simple communication protocol simplifying the programming requirements when communicating with external hardware devices. the communication is full duplex and operates as a slave/master type, where the mcu can be either mas ter or s lave. a lthough the s pi interface s pecifcation can control multiple s lave devices from a single master , here, as only a single select pin, scs , is provided only one slave device can be connected to the spi bus. spi master/slave connection

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rev. 1.30 80 ?a??? ?? ?013 rev. 1.30 81 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu spi interface operation the spi i nterface i s a f ull d uplex sy nchronous se rial d ata l ink. i t i s a f our l ine i nterface wi th p in names sdi, sdo, sck and scs . pins sdi and sdo are the serial data input and serial data output lines , s ck is the s erial clock line and scs is the s lave s elect line. a s the sp i interface pins are pin-shared with normal i/o pins and with the i 2 c function pins, the spi interface must frst be enabled by selecting the sim enable confguration option and setting the correct bits in the simctl0/simctl2 register . after the spi configuration option has been configured it can also be additionally disabled or enabled using the simen bit in the simctl0 register . communication between devices connected to the spi interface is carried out in a slave/master mode with all data transfer initiations being implemen ted by the master . the master also controls the clock signal. as the device only contains a single scs pin only one slave device can be utilised. the spi function in this device offers the following features: ? full duplex synchronous data transfer ? both master and slave modes ? lsb frst or msb frst data transmission modes ? transmission complete fag ? rising or falling active clock edge ? wcol and csen bit enabled or disable select the status of the spi interface pins is determined by a number of facto rs such as whether the device is in the master or slave mode and upon the condition of certain control bits such as csen, simen and scs . in the table i, z represents an input foating condition. there are s everal configuration options ass ociated w ith the s pi interface. o ne of these is to enable the sim function which selects the sim pins rather than normal i/o pins. note that if the confguration option does not select the sim function then the simen bit in the simctl0 register will have no ef fect. another two sim confguration options determine if the csen and wcol bits are to be used. confguration option function si ? fun ? tion si ? inte ? fa ? e o ? i/o pins spi csen bit enable/disable spi wcol bit enable/disable spi interface confguration options
rev. 1.30 8 ? ? a ??? ?? ? 013 rev. 1.30 83 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu spi registers there are three internal registers which control the overall operation of the spi interface. these are the simdr data register and two control registers simctl0 and simctl2. note that the simctl1 register is only used by the i 2 c interface. the simdr register is used to store the data being transmitted and received. the same register is used by bot h t he spi a nd i 2 c func tions. be fore t he m icrocontroller wri tes da ta t o t he spi bus, t he actual data to be transmitted must be placed in the simdr register . after the data is received from the spi bus, the microcontroller can read it from the simdr register . any transmission or reception of data from the spi bus must be made via the simdr register. bit 7 6 5 4 3 2 1 0 label sd7 sd ? sd5 sd4 sd3 sd ? sd1 sd0 r/w r/w r/w r/w r/w r/w r/w r/w r/w por x x x x x x x x there a re a lso t wo c ontrol r egisters f or t he spi i nterface, simc tl0 a nd si mctl2. no te t hat t he simctl2 register also has the name simar which is used by the i 2 c function. the simctl1 register is not used by the spi function, only by the i 2 c function. register simctl0 is used to control the enable/dis able function and to set the data transmission clock frequency . a lthough not connected with the spi function, the simctl0 register is also used to control the peripheral clock prescaler. register simctl2 is used for other control functions such as lsb/msb selection, write collision fag etc. the following gives further explanation of each simctl1 register bit: ? simidle the simidle bit is used to select if the spi interface continues running when the device is in the idle mode. setting the bit high all ows the spi interface to maintain operation when the device is in the idle mode. clearing the bit to zero disables any spi operations when in the idle mode. this spi/i 2 c idle mode control bit is located at clkmod register bit4. ? simen the simen bit is the overall on/of f control for the spi interface. when the simen bit is cleared to zero to disable the spi interface, the sdi, sdo, sck and scs lines will be in a floating condition and the spi operating current will be reduced to a minimum value. when the bit is high the spi interface is enabled. t he simen confguration option must have frst enabled the simen interface for this bit to be ef fective. note that when the simen bit changes from low to high the contents of the spi control registers will be in an unknown condition and should therefore be frst initialised by the application program.
rev. 1.30 8? ?a??? ?? ?013 rev. 1.30 83 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu ? sim0~sim2 these bits setup the overall operati ng mode of the sim function. as well as selecting if the i 2 c or spi function, they are used to control the spi master/slave selection and the spi master clock frequency. the spi clock is a function of the system clock but can also be chosen to be sourced from the t imer/event counter . if the spi slave mode is selected then the clock will be supplied by an external master device. sim0 sim1 sim2 spi master/slave clock control and i 2 c enable 0 0 0 spi ? aste ?? f sys /4 0 0 1 spi ? aste ?? f sys /1 ? 0 1 0 spi ? aste ?? f sys / ? 4 0 1 1 spi ? aste ?? f sub 1 0 0 spi ? aste ? time ? /event counte ? 0 output/ ? 1 0 1 spi slave 1 1 0 i ? c mode 1 1 0 not used spi control register ? simctl2 the simctl2 register is also used by the i 2 c interface but has the name simar. ? trf the trf bit is the t ransmit/receive complete fag and is set high automatically when an spi data transmission is completed, but must be cleared by the application program. it can be used to generate an interrupt. ? wcol the wcol bit is used to detect if a data collision has occurred. if this bit is high it means that data h as b een a ttempted t o b e wr itten t o t he si mdr r egister d uring a d ata t ransfer o peration. this writing operation will be ignored if data is being transferred. the bit can be cleared by the application program. note that using the wcol bit can be disabled or enabled via confguration option. ? csen the csen bit is used as an on/of f control for the scs pin. if this bit is low then the scs pin will be disabled and placed into a foating condition. if the bit is high the scs pin will be enabled and used as a select pin. note that using the csen bit can be disabled or enabled via confguration option. ? mls this is the data shift select bit and is used to select how the data is transferred, either msb or lsb frst. setting the bit high will select msb frst and low for lsb frst.
rev. 1.30 84 ? a ??? ?? ? 013 rev. 1.30 85 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu ? ckeg and ckpol these two bits are used to setup the way that the clock signal outputs and inputs data on the spi bus. these two bits must be confgured before data transfer is execute d otherwise an erroneous clock edge may be generated. the ckpol bit determines the base condition of the clock line, if the bit is high then the sck line will be low when the clock is inactive. when the ckpol bit is low then the sck line will be high when the clock is inactive. the ckeg bit determines active clock edge type which depends upon the condition of ckpol. ckpol ckeg sckclock signal 0 0 high base level active rising edge 0 1 high base level active falling edge 1 0 low base level a ? tive falling edge 1 1 low base level a ? tive rising edge

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rev. 1.30 84 ?a??? ?? ?013 rev. 1.30 85 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu

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? ? ? ? ? ? ?? ? ?? ? ? ?? ? ?? ? spi control register C simctl2 spi communication after t he spi i nterface i s e nabled by se tting t he sime n bi t hi gh, t hen i n t he ma ster mode , whe n data is written to the simdr register , transmission/reception will begin simultaneously . when the data transfer is complete, the trf fag will be set automatically , but must be cleared using the application program. in the slave mode, when the clock signal from the master has been received, any data in the simdr register will be transmitted and any data on the sdi pin will be shifted into the simdr re gister. t he m aster shoul d out put a n scs si gnal t o e nable t he sl ave de vice be fore a clock si gnal i s provi ded a nd sl ave da ta t ransfers shoul d be e nabled/disabled be fore/after a n scs signal is received. the spi will continue to function even after a halt instruction has been executed.
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rev. 1.30 8 ? ? a ??? ?? ? 013 rev. 1.30 87 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu

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rev. 1.30 8? ?a??? ?? ?013 rev. 1.30 87 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu

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? ? ? ? ? ? ? - ? ? ?? ?? ? ?? ? ??????? ?? ? ?? ?? ? spi transfer control flowchart
rev. 1.30 88 ? a ??? ?? ? 013 rev. 1.30 89 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu i 2 c interface the i 2 c interface is used to communicate with external peripheral devices such as sensors, eeprom m emory e tc. or iginally d eveloped b y ph ilips, i t i s a t wo l ine l ow sp eed se rial i nterface for synchronous serial data transfer . the advantage of only two lines for communication, relatively simple communication protocol and the ability to accommodate multiple devices on the same bus has made it an extremely popular interface type for many applications. i 2 c interface operation the i 2 c serial interface is a two line interf ace, a serial data line, sda, and serial clock line, scl. as many devices may be connected together on the same bus, their outputs are both open drain types. for this reason it is necessary that external pull-high resistors are connected to these outputs. note that no chip select line exists, as each device on the i 2 c bus is identifed by a unique address which will be transmitted and received on the i 2 c bus. when two device s communicate with each other on the bidirectional i 2 c bus, one is known as the master de vice a nd one a s t he sl ave de vice. bot h m aster a nd sl ave c an t ransmit a nd re ceive da ta, however, it is the master device that has overall control of the bus. for these devices, which only operates in slave mode, there are two methods of transferring data on the i 2 c bus, the slave transmit mode and the slave receive mode. there are several confguration options associated with the i 2 c interface. one of these is to enable the function which selects the sim pins rather than normal i/o pins. note that if the confguration option does not select the sim function then the simen bit in the simctl0 register will have no effect. a c onfguration op tion e xists t o a llow a c lock ot her t han t he syst em c lock t o dr ive t he i 2 c interface. another confguration option determines the debounce time of the i 2 c interface. this uses the internal clock to in ef fect add a debounce time to the external cloc k to reduce the possibility of glitches on the clock line causing erroneous operation. the debounce time, if selected, can be chosen to be either 1 or 2 system clocks. sim function si ? fun ? tion inte ? fa ? e o ? seg pins i ? c ? lo ? k i ? c ? uns wit ? out inte ? nal ? lo ? k disable/enable i ? c deboun ? e no debounce, 1 system clock; 2 system clocks i 2 c interface confguration options

rev. 1.30 88 ?a??? ?? ?013 rev. 1.30 89 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu i 2 c registers there are three control registers associated with the i 2 c bus, simctl0, simctl1 and simar and one data register , simdr. the simdr register , which is shown in the above spi section, is used to store the data being transmitted and received on the i 2 c bus. before the microcontroller writes data to the i 2 c bus, the actual data to be transmitted must be placed in the simdr register . after the data is received from the i 2 c bus, the microcontroller can read it from the simdr register . any transmission or reception of data from the i 2 c bus must be made via the simdr register. note that the simar register also has the name simctl2 which is used by the spi function. bits simidle, simen and bits sim0~sim2 in register simctl0 are used by the i 2 c interface. the simctl0 register is shown in the above spi section. ? simidle the simidle bit is used to select if the i 2 c interface continues running when the device is in the idle mode. setting the bit high allo ws the i 2 c interface to maintain operation when the device is in the idle mode. clearing the bit to zero disables any i 2 c operations when in the idle mode. this spi/i 2 c idle mode control bit is located at clkmod register bit4. ? simen the simen bit is the overall on/of f control for the i 2 c interface. when the simen bit is cleared to zero to disable the i 2 c interface, the sda and scl lines will be in a foating condition and the i 2 c operating current will be reduced to a minimum value. in this condition the pins can be used as seg functions. when the bit is high the i 2 c interface is enabled. the sim confguration option must have frst enabled the sim interface for this bit to be ef fective. note that when the simen bit changes from low to high the contents of the i 2 c control registers will be in an unknown condition and should therefore be frst initialised by the application program ? sim0~sim2 these bits setup the overall operating mode of the sim function. t o select the i 2 c function, bits sim2~sim0 should be set to the value 110. ? rxak the r xak fa g i s t he r eceive a cknowledge fa g. w hen t he r xak b it h as b een r eset t o z ero i t means that a correct acknowledge signal has been received at the 9th clock, after 8 bits of data have been transmitted. when in the transmit mode, the transmitter checks the rxak bit to determine if the receiver wishes to receive the next byte. the transmit ter will therefore continue sending out data until the rxak bit is set high. when this occurs, the transmitter will release the sda line to allow the master to send a stop signal to release the bus. ? srw the srw bit is the slave read/write bit. this bit determines whether the master device wishes to transmit or receive data from the i 2 c bus. when the transmitted address and slave address match, that is when the haas bit is set high, the device will check the sr w bit to determine whether it should be in transmit mode or receive mode. if the sr w bit is high, the master is requesting to read data from the bus, so the devic e should be in transmit mode. when the sr w bit is zero, the master will write data to the bus, therefore the device should be in receive mode to read this data. ? txak the txak fag is the transmit acknowledge fag. after the receipt of 8-bit of data, this bit will be transmitted to the bus on the 9th clock. t o continue receiving more data , this bit has to be reset to zero before further data is received. ? htx the htx fag is the transmit/receive mode bit. this fag should be set high to set the transmit mode and low for the receive mode.
rev. 1.30 90 ? a ??? ?? ? 013 rev. 1.30 91 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu ? hbb the hbb fag is the i 2 c busy fag. this fag will be high when the i 2 c bus is busy which will occur when a st art signal is detec ted. the fag will be reset to zero when the bus is free which will occur when a stop signal is detected. ? hass the haas fl ag i s t he a ddress m atch fl ag. t his fl ag i s use d t o de termine i f t he sl ave de vice address is the same as the master transmit address. if the addresses match then this bit will be high, if there is no match then the fag will be low. ? hcf the hcf fag is the data transfer fag. this fag will be zero when data is being transferred. upon completion of an 8-bit data transfer the fag will go high and an interrupt will be generated.

? ? ? ? ? ?-? ? ? ? ?? ? ?? ? ? ? ? ? ? ? ? i 2 c block diagram i 2 c control register ? simar the simar register is also used by the spi interface but has the name simctl2. the simar register is the location where the 7-bit slave address of the microcontroller is stored. bits 1~7 of the simar register defne the microcontroller slave address. bit 0 is not defned. when a master device, which is connected to the i 2 c bus, sends out an address, which matches the slave address in the simar register , the microcontroller slave device will be selected. note that the simar register is the same register as simctl2 which is used by the spi interface.
rev. 1.30 90 ?a??? ?? ?013 rev. 1.30 91 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu i 2 c bus communication communication on the i 2 c bus requires four separate steps, a st art signal, a slave device address transmission, a data transmission and finally a st op signal. when a st art signal is placed on the i 2 c bus, all devices on the bus will receive this signal and be notifed of the imminent arrival of data on the bus. the frst seven bits of the data will be the slave address with the frst bit being the msb. if the address of the microcontroller matches that of the transmitted address, the haas bit in the simctl1 register will be set and an i 2 c interrupt will be generated. after entering the interrupt service routine, the microcontroller slave device must first check the condition of the haas bit to determine whether the interrupt source originates from an address match or from the completion of a n 8-bi t da ta t ransfer. duri ng a da ta t ransfer, not e t hat a fter t he 7-bi t sl ave a ddress has been transmitt ed, the following bit, which is the 8th bit, is the read/ write bit whose value will be placed in the sr w bit. this bit will be checked by the microcontrolle r to determine whether to go into transmit or receive mode. before any transfer of data to or from the i 2 c bus, the microcontroller must initialise the bus, the following are steps to achieve this: ? step 1 write the slave address of the microcontroller to the i 2 c bus address register simar. ? step 2 set the simen bit in the simctl0 register to 1 to enable the i 2 c bus. ? step 3 set the esim bit of the interrupt control register to enable the i 2 c bus interrupt.
? ? ? ? ? ? ? -? ? ? ? ? ? ?? - ? ? -? i 2 c bus initialisation flow chart
rev. 1.30 9 ? ? a ??? ?? ? 013 rev. 1.30 93 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu
? ? ? ? ? ? ? ? - ?
- ? ? i 2 c communication timing diagram

? ? ? ? i 2 c bus isr flow chart
rev. 1.30 9? ?a??? ?? ?013 rev. 1.30 93 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu start signal the st art signal can only be generated by the master device connec ted to the i 2 c bus and not by the micro controller, which is only a slave device. this st art signal will be detected by all devices connected t o t he i 2 c bus. w hen de tected, t his i ndicates t hat t he i 2 c bus i s busy a nd t herefore t he hbb bit will be set. a st art condition occurs when a high to low transition on the sda line takes place when the scl line remains high. slave address the t ransmission o f a st art si gnal b y t he m aster wi ll b e d etected b y a ll d evices o n t he i 2 c b us. to determine which slave device the master wishes to communicate with, the address of the slave device will be sent out immediately following the st art signal. all slave devices, after receiving this 7-bit address data, will compare it with their own 7-bit slave address. if the address sent out by the maste r matche s the internal address of the microcontroller slave device, then an internal i 2 c bus interrupt signal wil l be generat ed. the next bit fol lowing the address, which is the 8th bit, defnes the read/write status and will be saved to the sr w bit of the simctl1 register . the device will then transmit an acknowledge bit, which is a low level, as the 9th bit. the microcontroller slave device will also set the status fag haas when the addresses match. as an i 2 c bus interrupt can come from two sources, when the program enters the interrupt subroutine, t he haas bi t shoul d be e xamined t o se e whe ther t he i nterrupt sourc e ha s c ome from a matching slave address or from the completion of a data byte transfer . when a slave address is matched, the device must be placed in either the transmit mode and then write data to the simdr register, or in the receive mode where it must implement a dummy read from the simdr register to release the scl line.
i 2 c slave address register C simar srw bit the sr w bit in the simctl1 register defnes whether the microcontroller slave device wishes to read data from the i 2 c bus or write data to the i 2 c bus. the microcontr oller should examine this bit to determine if it is to be a transmitter or a receiver . if the sr w bit is set to 1 then this indicates that the master wishes to read data from the i 2 c bus, therefore the micro controller slave device must be setup to send data to the i 2 c bus as a transmitter . if the sr w bit is 0 then this indicates that the master wishes to send data to the i 2 c bus, therefore the microcontrolle r slave device must be setup to read data from the i 2 c bus as a receiver.
rev. 1.30 94 ? a ??? ?? ? 013 rev. 1.30 95 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu acknowledge bit after the mas ter has trans mitted a calling addres s, any s lave device on the i 2 c bus , w hose own internal address matches the calling address, mus t generate an acknowledge signal. this acknowledge si gnal wi ll i nform t he m aster t hat a sl ave de vice ha s a ccepted i ts c alling a ddress. if no acknowl edge signal is re ceived by the master then a st op signal must be transmitt ed by the master to end the communication. when the haas bit is high, the addresses have matched and the microcontroller slave device must check the sr w bit to determine if it is to be a transmitter or a receiver. if the sr w bit is high, the microcontroller slave device should be setup to be a transmitter so the htx bit in the simctl1 register should be set to 1 if the sr w bit is low then the microcontroller slave device should be setup as a receiver and the htx bit in the simctl1 register should be set to 0. data byte the transmitted data is 8-bit wide and is transmitted after the slave device has acknowledged receipt of its slave address. the order of serial bit transmission is the msb frst and the lsb last. after receipt of 8-bit of data, the receiver must transmit an acknowledge signal, level 0, before it can receive t he ne xt da ta byt e. if t he t ransmitter doe s not re ceive a n a cknowledge bi t si gnal from t he receiver, t hen i t wi ll re lease t he sda l ine a nd t he m aster wi ll se nd o ut a st op si gnal t o re lease control of the i 2 c bus. the corresponding data will be stored in the simdr register . if setup as a transmitter , the microcontroller slave device must frst write the data to be transmitted into the simdr register . if setup as a receiver , the microcontroller slave device must read the transmitted data from the simdr register. data timing diagram receive acknowledge bit when the receiver wishes to continue to receive the next data byte, it must generate an acknowledge bit, known as txak, on the 9th clock. the microcontroller slave device, which is setup as a transmitter will check the rxak bit in the simctl1 register to dete rmine if it is to send another data byt e, i f not t hen i t wi ll re lease t he sda l ine a nd a wait t he re ceipt of a st op si gnal from t he master.
rev. 1.30 94 ?a??? ?? ?013 rev. 1.30 95 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu peripheral clock output the peripheral clock output allows the device to supply external hardware with a clock signal synchronised to the microcontroller clock. peripheral clock operation as the peripheral clock output pin,, is shared with one of the lcd segment lines, the required pin function is chosen via in simctl0 register . the peripheral clock function is controlled using the simctl0 register . the clock source for the peripheral clock output can originate from either the timer/event counter 0 divided by two or a divided ratio of the internal f sys clock. the bit in the simctl0 register is the overall on/of f control, setting the bit high enables the peripheral clock, clearing it disable s it. the required division ratio of the system clock is selected using the pckpsc0 and pckpsc1 bits in the same register . if the system enters the sleep mode this will disable the peripheral clock output.

? peripheral clock block diagram

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? ? ? ? ? - -
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?? ? ?? ? ? ? ? ? peripheral clock output control C simctl0
rev. 1.30 9 ? ? a ??? ?? ? 013 rev. 1.30 97 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu buzzer operating in a similar way to the programmable frequency divider , the buzzer function provides a m eans o f p roducing a v ariable f requency o utput, su itable f or a pplications su ch a s pi ezo-buzzer driving or ot her e xternal c ircuits t hat re quire a pre cise fre quency ge nerator. t he bz a nd bz pi ns form a complementary pair , and are pin-shared with i/o pins, p a0 and p a1. a confguration option is used to select from one of three buzzer options. the frst option is for both pins pa0 and pa1 to be used as normal i/os, the second option is for both pins to be confgured as bz and bz buzzer pins, the third option selects only the p a0 pin to be used as a bz buzzer pin with the p a1 pin retaining its normal i/o pin function. note that the bz pin is the inverse of the bz pin which together generate a differential output which can supply more power to connected interfaces such as buzzers. the buzzer is driven by the internal clock source,, which then passes through a divider , the division ratio of which is selected by confguration options to provide a range of buzzer frequencies from f s /2 2 t o f s /2 9 . t he c lock so urce t hat g enerates f s , wh ich i n t urn c ontrols t he b uzzer f requency, c an originate from three dif ferent sources, the 32768hz oscillator , the 32k_int oscillator or the system oscillator/4, the choice of which is determined by the f s clock source confguration option. note that the buzzer frequency is controlled by confguration options, which select both the source clock for the internal clock f s and the internal division ratio. there are no internal registers associated with the buzzer frequency. if the configuration options have selected both pins p a0 and p a1 to function as a bz and bz complementary pair of buzzer outputs, then for correct buzzer operatio n it is essential that both pins must be set up a s out puts by set ting bi ts p ac0 a nd p ac1 of t he p ac port c ontrol re gister t o z ero. the pa0 data bit in the pa data register must also be set high to enable the buzzer outputs, if set low, both pins p a0 and p a1 will remain low . in this way the single bit p a0 of the p a register can be used as an on/of f control for both the bz and bz buzzer pin outputs. note that the p a1 data bit in the p a register has no control over the bz buzzer pin pa1.
? ??? ? ? -? -? buzzer function pa0/pa1 pin function control pac register pac0 pac register pac1 pa data register pa0 pa data register pa1 output function 0 0 1 x pa0=bz pa1= bz 0 0 0 x pa0=0 pa1=0 0 1 1 x pa0=bz pa1=input line 0 1 0 x pa0=0 pa1=input line 1 0 x d pa0=input line pa1=d 1 1 x x pa0=input line pa0=input line x" stands for dont care; d stands for data 0 or 1
rev. 1.30 9? ?a??? ?? ?013 rev. 1.30 97 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu if confguration options have select ed that only the p a0 pin is to function as a bz buzzer pin, then the p a1 pin can be used as a normal i/o pin. for the p a0 pin to function as a bz buzzer pin, p a0 must b e se tup a s a n o utput b y se tting b it p ac0 o f t he p ac p ort c ontrol r egister t o z ero. t he p a0 data bit in the p a data register must also be set high to enable the buzzer output, if set low pin p a0 will remain low . in this way the p a0 bit can be used as an on/of f control for the bz buzzer pin p a0. if the p ac0 bit of the p ac port control register is set high, then pin p a0 can still be used as an input even though the confguration option has confgured it as a bz buzzer output. note that no matter what confguration option is chosen for the buzzer, if the port control register has setup the pin to function as an input, then this will override the confguration option selection and force the pin to always behave as an input pin. this arrangement enables the pin to be used as both a buzzer pin and as an input pin, so regardless of the confguration option chosen; the actual function of the pin can be changed dynamically by the application program by programming the appropriate port control register bit.

buzzer output pin control note: the above drawing shows the situation where both pins p a0 and p a1 are selected by confguration option to be bz and bz buzzer pin outputs. the port control register of both pins must have already been setup as output. the data setup on pin p a1 has no ef fect on the buzzer outputs.
rev. 1.30 98 ? a ??? ?? ? 013 rev. 1.30 99 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu interrupts interrupts are an important part of any microcontroller system. when an external event or an internal function such as a t imer/event counter or an a/d converter requires microcontroller attention, their corresponding interrupt will enforce a temporary suspension of the main program allowing the microcontroller to direct attention to their respective needs. the device contains several external interrupt and inter nal interrupts functions. the external interrupts are controlled by the action of the external int0, int1 and pint pins, while the internal interrupts are controlled by the t imer/event counter overfows, the t ime base interrupt, the r tc interrupt, the spi/i 2 c interrupt and the the a/d converter interrupt. interrupt registers overall interrupt control, which means interrupt enabling and request fag setting, is controlled by the intc0, intc1, and mfic/mfic0/mfic1 registers, which are located in the data memory . by controlling t he a ppropriate e nable bi ts i n t hese re gisters e ach i ndividual i nterrupt c an be e nabled or disabled. also when an interrupt occurs, the corresponding request flag will be set by the microcontroller. the global enable fag if cleared to zero will disable all interrupts.

? ? ? ? ? ? ? ?
?
? interrupt control register C intc0
rev. 1.30 98 ?a??? ?? ?013 rev. 1.30 99 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu

?
? ? ? ? ? ? ? ?
?
? ? ? ? ? ? ? ? interrupt control register C intc1

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? ?
? ? ? ? ? ? ? ? ? ? ? ? ? interrupt control register C mfic/mfic0
rev. 1.30 100 ? a ??? ?? ? 013 rev. 1.30 101 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu

? ? interrupt control register C mfic1 interrupt operation a t imer/event counter overflow , t ime base, r tc overflow , spi/i 2 c data transfer complete, an end of a/d conversion or the external interrupt line being triggered will all generate an interrupt request by setting their corresponding request flag. when this happens and if their appropriate interrupt enable bit is set, the program counter , which stores the address of the next instruction to be executed, will be transferred onto the stack. the program counter will then be loaded with a new address which will be the value of the corresponding interrupt vector . the microcontroller will then fetch its next instruction from this interrupt vector . the instruction at this vector will usually be a jmp statement which will jump to another section of program which is known as the interrupt service routine. here is located the code to control the appropriate interrupt. the interrupt service routine must be terminated with a reti statement, which retrieves the original program counter address from the stack and allows the microcontroller to continue with normal execution at the point where the interrupt occurred. the various interrupt enable bits, together with their associated request flags, are shown in the accompanying diagram with their order of priority. once an interrupt subroutine is serviced, all the other interrupts will be blocked, as the emi bit will be cleared automatically . this will prevent any further interrupt nesting from occurring. however , if other interrupt requests occur during this interval, although the inter rupt will not be immediately serviced, the request fag will still be recorded. if an interrupt requires immediate servicing while the program is alread y in another interrupt service routine, the emi bit should be set after entering the routine, to allow interrupt nesting. if the stack is full, the interrupt request will not be acknowledged, even if the related interrupt is enabled, until the stack pointer is decremented. if immediate service is desired, the stack must be prevented from becoming full.
rev. 1.30 100 ?a??? ?? ?013 rev. 1.30 101 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu

? ? ? ?? ? ? ? ? ? ? - ?? ? ? ?? ? ? ? ? ?? - ? ? ? ?? - ? ? - ? - ? ? ? ? ? ? ? ? ? ? ?
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ? ? ? ?? ? ?? ? ? ? ? ? ? ? ?? ? interrupt structure
rev. 1.30 10 ? ? a ??? ?? ? 013 rev. 1.30 103 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu interrupt priority interrupts, occurri ng in the interval between the rising edges of two consecutive t2 pulses, will be serviced on the latter of the two t2 pulses, if the corresponding interrupts are enabled. in case of simultaneous requests, the following table shows the priority that is applied. interrupt source priority vector exte ? nal inte ?? upt 0 1 04h exte ? nal inte ?? upt 1 ? 08h timer/event counter 0 overfow 3 0ch timer/event counter 1 overfow 4 10h spi/i ? c inte ?? upt 5 14h ? ulti-fun ? tion inte ?? upt ? 18h the a/d converte r interrupt, real t ime clock interrupt, t ime base inte rrupt and external peripheral interrupt all share the same interrupt vector which is 18h. each of these interrupts have their own own i ndividual i nterrupt f lag b ut a lso sh are t he sa me mff i nterrupt f lag. t he mff f lag wi ll b e cleared by hardware once the multi-function interrupt is serviced, however the individual interrupts that have triggered the multi-function interrupt need to be cleared by the application program. external interrupt for an external interrupt to occur , the global interrupt enable bit, emi, and external interrupt enable bits, eei0 and eei1, must frst be set. additionally the correct interrupt edge type must be selected using the intedge register to enable the external interrupt function and to choose the trigger edge type. an a ctual e xternal i nterrupt wi ll t ake pl ace whe n t he e xternal i nterrupt re quest fa g, e if0 or eif1, is set, a situation that will occur when a transition, whose type is chosen by the edge select bit, a ppears o n t he i nt0 o r i nt1 p in. t he e xternal i nterrupt p ins a re p in-shared wi th t he i /o p ins pd4 and pd5 and can only be confgured as external interrupt pins if their corresponding external interrupt enable bit in the intc0 register has been set. the pin must also be setup as an input by setting t he corresponding pdc.4 and pdc.5 bit s i n t he port cont rol regi ster. whe n t he i nterrupt i s enabled, the stack is not full and the correct transition type appears on the external interrupt pin, a subroutine call to the external interrupt vector at location 04h or 08h, will take place. when the interrupt is serviced, the external interrupt request fags, eif0 or eif1, will be automatically reset and the emi bit will be automatically cleared to disable other interrupts. note that any pull-high resistor selections on this pin will remain valid even if the pin is used as an external interrupt input. the intedge register is used to select the type of active edge that will trigger the external interrupt. a choice of either rising and falling edge types can be chosen along with an option to allow both edge types to trigger an external interrupt. note that the intedge register can also be used to disable the external interrupt function.

rev. 1.30 10? ?a??? ?? ?013 rev. 1.30 103 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu

interrupt active edge register C intedge the external interrupt pins are connected to an internal flter to reduce the possibility of unwanted external interrupts due to adverse noise or spikes on the external interrupt input signal. as this internal flter circuit will consume a limited amount of power , a confguration option is provided to switch of f the flter function, an option which may be benefcial in power sensitive applications, but in which the integrity of the input signal is high. care must be taken when using the flter on/of f confguration option as it will be applied not only to both the external interrupt pins but also to the timer/event counter external input pins. individual external interrupt or t imer/event counter pins cannot be selected to have a flter on/off function. external peripheral interrupt the exte rnal peripheral interrupt operates in a similar way to the exter nal interrupt and is contained within the multi-function interrupt. for an external peripheral interrupt to occur , the global interrupt enable bit, emi, external peripheral interrupt enable bit, epi, and multi-function interrupt enable bit, emfi, must frst be set. an actual external peripheral interrupt will take place when the external interrupt request fag, pef , is set, a situation that will occur when a negative transition, appears on the pint pin. the external peripheral interrupt pin is pin-shared with one of the segment pins, and is confgured as a peripheral interrupt pin via a confguration option. when the interrupt is enabled, the stack is not full and a negative transition type appears on the external peripheral interrupt pin, a subroutine call to the multi-function interrupt vector at location 18h, will take place. when the external peripheral interrupt is serviced, the emi bit will be cleared to disable other interrupts, however only the mff interrupt request fag will be reset. as the pef fag will not be automatically reset, it has to be cleared by the application program.
rev. 1.30 104 ? a ??? ?? ? 013 rev. 1.30 105 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu timer/event counter interrupt for a t imer/event counter 0 or t imer/event counter 1 interrupt to occur, the global interrupt enable bit, emi, and the corresponding timer interrupt enable bit, et0i or et1i must frst be set. an actual timer/event counter interrupt will take place when the t imer/event counter request fag, t0f or t1f is set, a situation that will occur when the t imer/event counter overfows. when the interrupt is enabled, the stack is not full and a t imer/event counter overflow occurs, a subroutine call to the timer interrupt vector at location 0ch or 10h, will take place. when the interrupt is serviced, the timer interrupt request flag, t0f or t1f , will be automatically reset and the emi bit will be automatically cleared to disable other interrupts. timer event counter 0 and t imer/event counter 1 have their own individual interrupt vectors, however the interrupt vector for t imer/event counter 2 is contained within the multi-function interrupt. for a t imer/event counter 2 interrupt to occur , the global interrupt enable bit, emi, timer/event counter 2 interrupt enable bit, et2i, and multi-function interrupt enable bit, emfi, must first be set. an actual external peripheral interrupt will take place when the t imer/event counter 2 request flag, t2f , is set, a situation that will occur when the t imer/event counter 2 overflows. w hen t he i nterrupt i s e nabled, t he st ack i s not ful l a nd t he t imer/event count er 2 overfows, a subroutine call to the multi-function interrupt vect or at location 18h, will take place. when the t imer/event 2 interrupt is serviced, the emi bit will be cleared to disable other interrupts, however only the mff interrupt request fag will be reset. as the t2f fag will not be automatically reset, it has to be cleared by the application program. a/d interrupt the a/d interrupt is contained within the multi-function interrupt. for an a/d interrupt to be generated, the global interrupt enable bit, emi, a/d interrupt enable bit, eadi, and multi-function interrupt enable bit, emfi, must frst be set. an actual a/d interrupt will take plac e when the a/d interrupt request fag, adf , is set, a situation that will occur when the a/d conversion proc ess ha s fni shed. w hen t he i nterrupt i s e nabled, t he st ack i s not ful l a nd t he a/ d conversion proces s has ended, a s ubroutine call to the m ulti-function interrupt vector at location 18h, will take place. when the a/d interrupt is serviced, the emi bit will be cleared to disable other interrupts, however only the m ff interrupt reques t f ag w ill be res et. a s the a df f ag w ill not be automatically reset, it has to be cleared by the application program. spi/i 2 c interface interrupt for an spi/i 2 c interrupt to occur , the global interrupt enable bit, emi, and the corresponding interrupt enable bit, esim must be frst set. an actual spi/i 2 c interrupt will take place when the spi/i 2 c interrupt request fag, simf , is set, a situation that will occur when a byte of data has been transmitted or re ceived by t he spi/ i 2 c i nterface or whe n a n i 2 c a ddress m atch oc curs. w hen t he interrupt is enable d, the stack is not full and a byte of data has been transmitted or received by the spi/i 2 c interface or an i 2 c address match occurs, a subroutine call to the spi/i 2 c interrupt vector at location 14h, will take place. when the interrupt is serviced, the spi/i 2 c request fag, simf will be automatically reset and the emi bit will be automatically cleared to disable other interrupts.
rev. 1.30 104 ?a??? ?? ?013 rev. 1.30 105 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu multi-function interrupt an additional interrupt known as the multi-function interrupt is provided. unlike the other interrupts, t his i nterrupt ha s no i ndependent sourc e, but ra ther i s form ed from four or fi ve ot her existing interrupt sources, namely the a/d converter interrupt, t ime base interrupt, real t ime clock interrupt, external peripheral interrupt and the t imer 2 overfow interrupt. for a multi-function interrupt to occur , the global interrupt enable bit, emi, and the multi-function interrupt enable bit, emfi, must first be set. an actual multi-function interrupt will take place when the multi-function interrupt request flag, mff , is set. this will occur when either a t ime base overfow , a real t ime clock overfow , an a/d conversion completion, an external peripheral interrupt or t imer 2 overfow interrupt is generated. when the interrupt is enabled and the stack is not full, and either one of the interrupts contained within the multi-function interrupt occurs, a subroutine call to the multi-function interrupt vector at location 018h will take place. when the interrupt is serviced, the multi-function request fag, mff , will be automatically reset and the emi bit will be automatically cleared to disable other interrupts. however , it must be noted that the request fags from the original source of the multi-function interrupt, namely the t ime-base interrupt, real t ime clock interrupt, a/d converter interrupt, external peripheral interrupt or t imer 2 overfow interrupt will not be automatically reset and must be manually reset by the application program. real time clock interrupt the real t ime clock interrupt is contained within the multi-function interrupt. for a real t ime clock interrupt to be generated, the global interrupt enable bit, emi, real t ime clock interrupt enable bit, er ti, and multi-function interrupt enable bit, emfi, must frst be set. an actual real time clock interrupt will take place when the real time clock request fag, r tf, is set, a situatio n that will occur when the real t ime clock overfows. when the interrupt is enabled, the stack is not full and the real t ime clock overfows, a subroutine call to the multi-function interrupt vector at location 18h, will take place. when the real t ime clock interrupt is serviced, the emi bit will be cleared to disable other interrupts, however only the mff interrupt request fag will be reset. as the rtf fag will not be automatically reset, it has to be cleared by the application program. similar in operati on to the t ime base interrupt, the purpose of the r tc interrupt is also to provide an interrupt signal at fxed time periods. the r tc interrupt clock source originates from the internal clock s ource f s . this f s input clock firs t pas ses through a divider , the divis ion ratio of w hich is selected by programming the appropriate bits in the r tcc register to obtain longer r tc interrupt periods whose value ranges from 2 8 /f s ~2 15 /f s . the clock source that generates f s , which in turn controls the r tc interrupt period, can originate from three dif ferent sources, the 32768hz oscillator , 32k_int oscillator or the system oscillator/4, the choice of which is determine by the f s clock source confguration option. note that the r tc interrupt period is controlled by both configuration options and an internal register r tcc. a configuration option selects the source clock for the internal clock f s , and the rtcc register bits r t2, r t1 and r t0 select the division ratio. note that the actual division ratio can be programmed from 2 8 to 2 15 .
? ??? ? ?- ?? ? ? ? ? ? ? ?- ? ? ? ? ? rtc interrupt
rev. 1.30 10 ? ? a ??? ?? ? 013 rev. 1.30 107 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu
? ? ? ?? ? ? - ?? - ? ?? ?? ?? ? ???? ? - ? ?? - ?? ? ? ?? ? ? - ? ? ? ? ?? ? - ?? ? ? ? ?? ? ? ??? ? ??? ? ? real time clock control register C rtcc time base interrupt the t ime base interrupt is contained within the multi-function interrupt. for a t ime base interrupt to be generated, the global interrupt enable bit, emi,t ime base interrupt enable bi t, e tbi, a nd mult i-function i nterrupt e nable bi t, e mfi, m ust frst be set . an a ctual t ime base interrupt will take place when the t ime base interrupt request fag, tbf , is set, a situation that will occur when the t ime base overfows. when the interrupt is enabled, the stack is not full and the time base overfows, a subroutine call to the multi-function interrupt vector at location 18h, will take place. when the t ime base interrupt is serviced, the emi bit will be cleared to disable other interrupts, however only the mff interrupt request fag will be reset. as the tbf fag will not be automatically reset, it has to be cleared by the application program. the purpose of the t ime base function is to provide an interrupt signal at fxed time periods. the time base interrupt clock source originates from the t ime base interrupt clock sourc e originates from the internal clock source f s . this f s input clock frst passes through a divider , the division ratio of whi ch i s se lected by c onfguration opt ions t o provi de l onger t ime ba se i nterrupt pe riods. t he time ba se i nterrupt t ime-out pe riod ra nges fr om 2 12 /f s ~2 15 /f s . t he c lock sou rce t hat ge nerates f s , which in turn controls the t ime base interrupt period, can originate from three dif ferent sources, the 32768hz oscillato r, the 32k_int internal oscillator or the system oscillator/4, the choice of which is determine by the f s clock source confguration option. essentially operating as a programmable timer , when the t ime base overfows it will set a t ime base inte rrupt fag which will in turn generate an interrupt request via the multi-function interrupt vector.
? ??? ? ? ?- ? ? ? ? ? ?- time base interrupt
rev. 1.30 10? ?a??? ?? ?013 rev. 1.30 107 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu programming considerations by disabling the interrupt enable bits, a requested interrupt can be prevented from being serviced, however, once an interrupt request fag is set, it will remain in this condition in the intc0, intc1 and mfic registers unt il the corresponding interrupt is serviced or until the request fag is cleared by the application program. it is recommended that programs do not use the call subroutine instruction within the interrupt subroutine. interrupts often occur in an unpredictable manner or need to be serviced immediately in some applications. if only one stack is left and the interrupt is not well controlled, the original control sequence will be damaged once a call subroutine is executed in the interrupt subroutine. all of these interrupts have the capability of waking up the processor when in the power down mode. only the program counter is pushed onto the stack. if the contents of the status or other registers are altered by the interrupt service program, which may corrupt the desired control sequence, then the contents should be saved in advance. reset and initialisation a reset function is a fundamental part of any microcontroller ensuring that the device can be set to some predetermined condition irrespective of outside parameters. the most important reset condition is after power is frst applied to the microcontroller . in this case, internal circuitry will ensure that the mi crocontroller, after a short delay , will be in a well defined state and ready to execute t he fr st p rogram i nstruction. af ter t his p ower-on r eset, c ertain i mportant i nternal r egisters will be set to defned states before the program commences. one of these registers is the program counter, which will be reset to zero forcing the microcontroller to begin program execution from the lowest program memory address. in a ddition t o t he p ower-on r eset, si tuations m ay a rise wh ere i t i s n ecessary t o f orcefully a pply a reset condition when the microcontroller is running. one example of this is where after power has be en a pplied a nd t he m icrocontroller i s a lready ru nning, t he res l ine i s fo rcefully pu lled l ow. in such a case, known as a normal operation reset, some of the microcontroller registers remain unchanged allowing the microcontroller to proceed with normal operation after the reset line is allowed to return high. another type of reset is when the w atchdog t imer overfows and resets the microcontroller. all types of reset operations result in different register conditions being setup. another reset exists in the form of a low v oltage reset, l vr, where a full reset, similar to the res reset is implemented in situations where the power supply voltage falls below a certain threshold.
rev. 1.30 108 ? a ??? ?? ? 013 rev. 1.30 109 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu reset functions there are five w ays in w hich a microcontroller res et can occur , through events occurring both internally and externally: ? power-on reset the most fundamental and unavoidable reset is the one that occurs afte r power is frst applied to the microcontroller. as well as ensuring that the program memory begins execution from the frst memory address, a power -on reset also ensures that certain other registers are preset to known conditions. all the i/o port and port control registers will power up in a high condition ensuring that all pins will be frst set to inputs. although the micr ocontroller has an internal rc reset function, if the v dd power supply rise time is not fast enough or does not stabilise quickly at power -on, the internal reset function may be incapable of providing proper reset operation. for this reason it is recommended that an external rc network is connected to the res pin, whose additional time delay will ensure that the res pin remains low for an extended period to allow the power supply to stabilise. during this time delay, normal operation of the mic rocontroller will be inhi bited. aft er the res li ne re aches a certain voltage v alue, t he r eset d elay t ime t rstd i s i nvoked t o p rovide a n e xtra d elay t ime a fter wh ich the microcontroller will begin normal operation. the abbreviation sst in the fgures stands for system start-up t imer. power-on reset timing chart for m ost a pplications a re sistor c onnected be tween vdd a nd t he res pi n a nd a c apacitor connected between vss and the res pin will provide a suitable external reset circuit. any wiring connected to the res pin should be kept as short as possible to minimise any stray noise interference. for applications that operate within an environment where more noise is present the reset circuit shown is recommended. more information regarding external reset circuits is located in application note ha0075e on the holtek website. note: "*" it is recommended that this component is added for added esd protection "**" it is recommended that this component is added in environments where power line noise is signifcant external res circuit
rev. 1.30 108 ?a??? ?? ?013 rev. 1.30 109 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu ? res pin reset this t ype of re set oc curs whe n t he m icrocontroller i s a lready ru nning a nd t he res pi n i s forcefully pulled low by external hardware such as an external switch. in this case as in the case of other reset, the program counter will reset to zero and program execution initiated from this point.
res reset timing chart ? low v oltage reset ? lvr the microcontroller contains a low voltage reset circuit in order to monitor the supply voltage of the device, which is selected via a confguration option. if the supply voltage of the device drops to within a range of 0.9v~v lvr such as might occur when changing the battery , the l vr will automatically res et the device internally . the l vr includes the follow ing s pecifications: for a valid l vr signal, a low volta ge, i.e., a voltage in the range between 0.9v~v lvr must exist for greater than the value t lvr specifed in the a.c. characteristics. if the low voltage state does not exceed 1ms, the l vr will ignore it and will not perform a reset function. one of a range of specifed voltage values for v lvr can be selected using confguration options. the v lvr value will be selected as a pair in conjunction with a low v oltage detect value. low voltage reset timing chart ? watchdog t ime-out reset during normal operation the w atchdog time-out reset during normal operation is the same as a hardware res pin reset except that the w atchdog time-out fag t o will be set to 1. wdt time-out reset during normal operation timing chart ? watchdog t ime-out reset during power down the w atchdog tim e-out reset during power down is a little dif ferent from other kinds of reset. most of the conditions remain unchanged except that the program counter and the stack pointer will be cleared to 0 and the t o fag will be set to 1. refer to the a.c. characteristics for t sst details. wdt time-out reset during power down timing chart
rev. 1.30 110 ? a ??? ?? ? 013 rev. 1.30 111 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu reset initial conditions the dif ferent types of reset described af fect the reset fags in dif ferent ways. these fags, known as p df and t o are located in the s tatus register and are controlled by various microcontroller operations, such as the power down function or w atchdog t imer. the reset fags are shown in the table: to pdf reset conditions 0 0 res ? eset du ? ing powe ? -on u u res o ? lvr ? eset du ? ing no ? mal ope ? ation 1 u wdt time-out ? eset du ? ing no ? mal ope ? ation 1 1 wdt time-out ? eset du ? ing powe ? down u stands for unchanged the following table indicates the way in which the various components of the microcontroller are affected after a power-on reset occurs. item condition after reset p ? og ? am counte ? reset to zero inte ?? upts all inte ?? upts will be disabled wdt clea ? afte ? ? eset ? wdt begins ? ounting time ? /event counte ? time ? counte ? will be tu ? ned off p ? es ? ale ? t ? e time ? counte ? p ? es ? ale ? will be ? lea ? ed input/output po ? ts i/o po ? ts will be setup as inputs sta ? k pointe ? sta ? k pointe ? will point to t ? e top of t ? e sta ? k the dif ferent kinds of resets all af fect the internal registers of the micr ocontroller in dif ferent ways. to ensure reliable continuation of normal program execution after a reset occurs, it is important to know what condition the microcontroller is in after a particular reset occurs. the following table describes h ow e ach t ype o f re set a ffects e ach of t he m icrocontroller i nternal re gisters. not e t hat where m ore t han one pa ckage t ype e xists t he t able wi ll re fect t he sit uation for t he l arger pa ckage type. HT56R62 register reset (power-on) res reset (normal operation) time-out (normal operation) time-out (halt) ? p0 ? x x x x x x x ? u u u u u u u ? u u u u u u u ? u u u u u u u ? p1 ? x x x x x x x ? u u u u u u u ? u u u u u u u ? u u u u u u u bp ? ? ? ? ? 0 0 0 ? ? ? ? ? 0 0 0 ? ? ? ? ? 0 0 0 ? ? ? ? ? u u u acc x x x x x x x x u u u u u u u u u u u u u u u u u u u u u u u u pcl 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 tblp x x x x x x x x u u u u u u u u u u u u u u u u u u u u u u u u tblh ? ? x x x x x x ? ? u u u u u u ? ? u u u u u u ? ? u u u u u u rtcc ? ? 0 0 0 1 1 1 ? ? 0 0 0 1 1 1 ? ? 0 0 0 1 1 1 ? ? u u u u u u status ? ? 0 0 x x x x ? ? u u u u u u ? ? 1 u u u u u ? ? 1 1 u u u u intc0 ? 0 0 0 0 0 0 0 ? 0 0 0 0 0 0 0 ? 0 0 0 0 0 0 0 ? u u u u u u u t ? r0 x x x x x x x x x x x x x x x x x x x x x x x x u u u u u u u u t ? r0c 0 0 ? 0 1 0 0 0 0 0 ? 0 1 0 0 0 0 0 ? 0 1 0 0 0 u u ? u u u u u t ? r1 x x x x x x x x x x x x x x x x x x x x x x x x u u u u u u u u t ? r1c 0 0 ? 0 1 0 0 0 0 0 ? 0 1 0 0 0 0 0 ? 0 1 0 0 0 u u ? u u u u u pa 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 u u u u u u u u pac 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 u u u u u u u u pb ? ? 1 1 1 1 1 1 ? ? 1 1 1 1 1 1 ? ? 1 1 1 1 1 1 ? ? u u u u u u
rev. 1.30 110 ?a??? ?? ?013 rev. 1.30 111 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu register reset (power-on) res reset (normal operation) time-out (normal operation) time-out (halt) pbc ? ? 1 1 1 1 1 1 ? ? 1 1 1 1 1 1 ? ? 1 1 1 1 1 1 ? ? u u u u u u pd ? 1 1 1 ? 1 1 1 ? 1 1 1 ? 1 1 1 ? 1 1 1 ? 1 1 1 ? u u u ? u u u pdc ? 1 1 1 ? 1 1 1 ? 1 1 1 ? 1 1 1 ? 1 1 1 ? 1 1 1 ? u u u ? u u u pw ? 0l 0 0 0 0 ? ? ? 0 0 0 0 0 ? ? ? 0 0 0 0 0 ? ? ? 0 u u u u ? ? ? u pwm0h 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u pw ? 1l 0 0 0 0 ? ? ? 0 0 0 0 0 ? ? ? 0 0 0 0 0 ? ? ? 0 u u u u ? ? ? u pwm1h 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u intc1 ? 0 0 0 ? 0 0 0 ? 0 0 0 ? 0 0 0 ? 0 0 0 ? 0 0 0 ? u u u ? u u u pw ?? l 0 0 0 0 ? ? ? 0 0 0 0 0 ? ? ? 0 0 0 0 0 ? ? ? 0 u u u u ? ? ? u pwm2h 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u adrl x x x x ? ? ? ? x x x x ? ? ? ? x x x x ? ? ? ? u u u u ? ? ? ? adrh x x x x x x x x x x x x x x x x x x x x x x x x u u u u u u u u adcr 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 u u u u u u u u acsr 1 0 ? ? ? 0 0 0 1 0 ? ? ? 0 0 0 1 0 ? ? ? 0 0 0 u u ? ? ? u u u clkmod 0 0 0 0 0 x 1 1 0 0 0 0 0 x 1 1 0 0 0 0 0 x 1 1 u u u u u u u u pawu 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u papu 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u pbpu ? ? 1 1 1 1 1 1 ? ? 1 1 1 1 1 1 ? ? 1 1 1 1 1 1 ? ? u u u u u u pdpu ? 1 1 1 ? 1 1 1 ? 1 1 1 ? 1 1 1 ? 1 1 1 ? 1 1 1 ? u u u ? u u u intedge ? ? ? ? 0 0 0 0 ? ? ? ? 0 0 0 0 ? ? ? ? 0 0 0 0 ? ? ? ? u u u u lcdctrl 0 0 0 ? 0 0 0 0 0 0 0 ? 0 0 0 0 0 0 0 ? 0 0 0 0 u u u ? u u u u lcdout1 ? ? ? ? ? ? ? 0 ? ? ? ? ? ? ? 0 ? ? ? ? ? ? ? 0 ? ? ? ? ? ? ? u lcdout ? 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u ? isc 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 u u u u u u u u ? fic 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u si ? ctl0 1 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 u u u u u u u u si ? ctl1 1 0 0 0 0 0 ? 1 1 0 0 0 0 0 ? 1 1 0 0 0 0 0 ? 1 u u u u u u ? u si ? dr x x x x x x x x x x x x x x x x x x x x x x x x u u u u u u u u si ? ar/si ? ctl ? 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u note: u stands for unchanged x stands for unknown ? stands for unimplemented
rev. 1.30 11 ? ? a ??? ?? ? 013 rev. 1.30 113 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu ht56r65/ht56r642/ht56r644/ht56r654/ht56r656 register reset (power-on) res reset (normal operation) time-out (normal operation) time-out (halt) ? p0 x x x x x x x x u u u u u u u u u u u u u u u u u u u u u u u u ? p1 x x x x x x x x u u u u u u u u u u u u u u u u u u u u u u u u bp ? ? ? ? ? 0 0 0 ? ? ? ? ? 0 0 0 ? ? ? ? ? 0 0 0 ? ? ? ? ? u u u acc x x x x x x x x u u u u u u u u u u u u u u u u u u u u u u u u pcl 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 tblp x x x x x x x x u u u u u u u u u u u u u u u u u u u u u u u u tblh x x x x x x x x u u u u u u u u u u u u u u u u u u u u u u u u rtcc ? ? 0 0 0 1 1 1 ? ? 0 0 0 1 1 1 ? ? 0 0 0 1 1 1 ? ? u u u u u u status ? ? 0 0 x x x x ? ? u u u u u u ? ? 1 u u u u u ? ? 1 1 u u u u intc0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u t ? r0 x x x x x x x x x x x x x x x x x x x x x x x x u u u u u u u u t ? r0c 0 0 ? 0 1 0 0 0 0 0 ? 0 1 0 0 0 0 0 ? 0 1 0 0 0 u u ? u u u u u tmr1h x x x x x x x x x x x x x x x x x x x x x x x x u u u u u u u u t ? r1l x x x x x x x x x x x x x x x x x x x x x x x x u u u u u u u u t ? r1c 0 0 0 0 1 ? ? ? 0 0 0 0 1 ? ? ? 0 0 0 0 1 ? ? ? u u u u u ? ? ? t ? r ? x x x x x x x x x x x x x x x x x x x x x x x x u u u u u u u u t ? r ? c 0 0 ? 0 1 0 0 0 0 0 ? 0 1 0 0 0 0 0 ? 0 1 0 0 0 u u ? u u u u u pa 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 u u u u u u u u pac 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 u u u u u u u u pb 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 u u u u u u u u pbc 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 u u u u u u u u pd 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 u u u u u u u u pdc 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 u u u u u u u u pw ? 0l 0 0 0 0 ? ? ? 0 0 0 0 0 ? ? ? 0 0 0 0 0 ? ? ? 0 u u u u ? ? ? u pwm0h 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u pw ? 1l 0 0 0 0 ? ? ? 0 0 0 0 0 ? ? ? 0 0 0 0 0 ? ? ? 0 u u u u ? ? ? u pwm1h 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u intc1 ? 0 0 0 ? ? 0 0 ? 0 0 0 ? ? 0 0 ? 0 0 0 ? ? 0 0 ? u u u ? ? u u pw ?? l 0 0 0 0 ? ? ? 0 0 0 0 0 ? ? ? 0 0 0 0 0 ? ? ? 0 u u u u ? ? ? u pwm2h 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u pw ? 3l 0 0 0 0 ? ? ? 0 0 0 0 0 ? ? ? 0 0 0 0 0 ? ? ? 0 u u u u ? ? ? u pwm3h 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u adrl x x x x ? ? ? ? x x x x ? ? ? ? x x x x ? ? ? ? u u u u ? ? ? ? adrh x x x x x x x x x x x x x x x x x x x x x x x x u u u u u u u u adcr 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 u u u u u u u u acsr 1 0 ? ? ? 0 0 0 1 0 ? ? ? 0 0 0 1 0 ? ? ? 0 0 0 u u ? ? ? u u u clkmod 0 0 0 0 0 x 1 1 0 0 0 0 0 x 1 1 0 0 0 0 0 x 1 1 u u u u u u u u pawu 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u papu 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u pbpu 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u pdpu 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u intedge ? ? ? ? 0 0 0 0 ? ? ? ? 0 0 0 0 ? ? ? ? 0 0 0 0 ? ? ? ? u u u u lcdctrl 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u lcdout1 ? ? ? ? ? ? 0 0 ? ? ? ? ? ? 0 0 ? ? ? ? ? ? 0 0 ? ? ? ? ? ? u u lcdout ? 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u ? isc 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 u u u u u u u u
rev. 1.30 11 ? ?a??? ?? ?013 rev. 1.30 113 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu register reset (power-on) res reset (normal operation) time-out (normal operation) time-out (halt) ? fic/ ? fic0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u ? fic1 ? ? ? 0 ? ? ? 0 ? ? ? 0 ? ? ? 0 ? ? ? 0 ? ? ? 0 ? ? ? u ? ? ? u si ? ctl0 1 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 u u u u u u u u si ? ctl1 1 0 0 0 0 0 ? 1 1 0 0 0 0 0 ? 1 1 0 0 0 0 0 ? 1 u u u u u u ? u si ? dr x x x x x x x x x x x x x x x x x x x x x x x x u u u u u u u u si ? ar/si ? ctl ? 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 u u u u u u u u note: u stands for unchanged x stands for unknown ? stands for unimplemented oscillator various oscillator options of fer the user a wide range of functions according to their various application requirements. five types of system clocks can be selected while various clock source options fo r t he w atchdog t imer a re pr ovided fo r m aximum fl exibility. al l osc illator op tions a re selected through the confguration options. system clock confgurations there are fve met hods of generatin g the system clock, two high oscillators, two low oscillators and an externally supplied clock. the two high oscillators are the external crystal/ceramic oscillator and the external rc network. the two low oscillators are the fully integrated 32k_int oscillator and the external 32768hz oscillator . selecting whether the low or high oscillator is used as the system oscillator is implemented using the hlclk bit in the clkmod register . the source clock for the high and low oscillators is chosen via confguration options. the frequency of the slow oscillator is also determined using the slowc0~slowc2 bits in the clkmod register. system crystal/ceramic oscillator after s electing the external crys tal confguration option, the s imple connection of a crys tal acros s osc1 and osc2, is normally all that is required to create the necessary phase shift and feedback for oscillation, without requiring extern al capacitors. however , for some crystal types and frequencies, to ensure oscillation, it may be necessary to add two small value capacitors, c1 and c2. using a ceramic resonator will usually require two small value capacitors, c1 and c2, to be connected as shown for oscillation to occur . the values of c1 and c2 should be selected in consultation with the crystal or resonator manufacturers specifcation. in most applications, resistor r p1 is not required, however for those applications where the l vr function is not used, r p1 may be necessary to ensure the oscill ator stops running when v dd falls below its operating range. the internal oscillator circuit contains a flt er c ircuit t o re duce t he possi bility of e rratic ope ration due t o noi se on t he osc illator pins. an additiona l confguration option must be setup to confgure the device according to whether the oscil lator frequency is high, defi ned as equal to or above 1mhz, or low , which is defi ned as below 1mhz. more information regarding oscillator applications is located on the holtek website. crystal/ceramic oscillator
rev. 1.30 114 ? a ??? ?? ? 013 rev. 1.30 115 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu crystal oscillator c1 and c2 values crystal frequency c1 c2 12mhz 8mhz 4mhz 1mhz 455khz (see note 2) 10pf 10pf note: 1. c1 and c2 values are for guidance only. 2. xtal mode confguration option: 455khz. 3. r p1 =5m?~10m? is recommended. crystal recommended capacitor values external system rc oscillator after se lecting t he c orrect c onfguration opt ion, usi ng t he e xternal syst em rc osc illator re quires that a resistor , with a value between 47k? and 1.5m?, is connected between osc1 and vdd, and a 470pf capacitor is connected to ground. although this is a cost ef fective oscillator confguration, the oscillation frequency can vary with v dd , temperature and process variations and is therefore not s uitable for applications w here timing is critical or w here accurate oscillator frequencies are required. for t he va lue of t he e xternal re sistor r osc re fer t o t he app endix se ction fo r t ypical r c oscillator vs. t emperature and v dd characteristics graphics. note t hat an i nternal ca pacitor t ogether wi th t he ext ernal resi stor, r osc , are t he com ponents whic h determine t he f requency o f t he o scillator. t he e xternal c apacitor sh own o n t he d iagram d oes n ot infuence the frequency of oscillatio n. this external capacitor should be added to improve oscillator stability i f t he ope n-drain osc2 out put i s ut ilised i n t he a pplication c ircuit. t he i nternal osc illator circuit contains a filter circuit to reduce the possibility of erratic operation due to noise on the oscillator pins.
rc oscillator
rev. 1.30 114 ?a??? ?? ?013 rev. 1.30 115 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu internal 32k_int oscillator when microcontrollers enter a power down condition, their internal clocks are normally switched off to stop microcontroller activity and to conserve power . however , in many microcontroller applications it may be necessary to keep some internal functions operational, such as timers, even wh en t he m icrocontroller i s i n t he po wer-down m ode. t o d o t his, t he d evice h as a 3 2k_int oscillator, which is a fully integrated free running rc oscillator with a typical period of 31.2s at 5v, requiring no external components. it is selected via confguration option. when the device enters the power down mode, the system clock will stop running, however the 32k_int oscillator will continue to run if selected to keep various internal functions operational. internal 32k_int oscillator external 32768hz oscillator with a function similar to the internal 32k-int 32khz oscillator , that is to keep some device functions operational during power down, this device also has an exte rnal 32768hz oscillator . this oscillator also remains active at all times , even w hen the microcontroller is in the pow er-down mode. this clock source has a fxed frequenc y of 32768hz and requires a 32768hz cryst al to be connected between pins osc3 and osc4. the exter nal resistor and capacitor components connected to the 32768hz crystal are not necessary to provide oscillation. for applications where precise frequencies are essential, these components may be re quired t o provi de fre quency c ompensation due t o di fferent c rystal m anufacturing tolerances. a c onfiguration opt ion se lects whe ther t he e xternal 32768hz osc illator or t he i nternal 32k_int oscillator is selected. selecting low frequency oscillators for use as a system oscillator is implmented using bits in the clkmod register. during power -up there is a time delay associated with the 32768hz oscillator waiting for it to start-up. t o minimise this time delay, bit 4 of the rtcc register, known as the qosc bit, is provided to have a quick start-up function. during a power -up condition, this bit will be cleared to zero which will initiate the 32768hz oscillator quick start-up function. however , as there is additional power consumption associated with this quick start-up function, to reduce power consumption after start-up takes place, it is recommended that the application program should set the qosc bit high for about 2 seconds after power -on. it should be noted that, no matter what condition the qo sc bit is set to, t he 3 2768hz o scillator wi ll a lways f unction n ormally, o nly t here i s m ore p ower c onsumption associated with the quick start-up function. external 32768hz oscillator
rev. 1.30 11 ? ? a ??? ?? ? 013 rev. 1.30 117 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu 32768hz oscillator c1 and c2 values crystal frequency c3 c4 32768hz 8pf 10pf note: 1. c3 and c4 values are for guidance only. ? . r p ? =5m~10m? is recommended. 32768 hz crystal recommended capacitor values external oscillator the system clock can also be supplied by an externally supplied clock giving users a method of synchronising t heir e xternal h ardware t o t he m icrocontroller o peration. t his i s se lected u sing a c onfiguration opt ion a nd suppl ying t he c lock on pi n osc1 . pi n osc2 shoul d be l eft fl oating if t he e xternal osc illator i s use d. t he i nternal osc illator c ircuit c ontains a fi lter c ircuit t o re duce the possi bility of e rratic ope ration due t o noise on t he osc illator pi n, howe ver a s t he fl ter c ircuit consumes a certain amount of power , a oscillator confguration option exists to turn this flter of f. not us ing the internal filter s hould be cons idered in pow er s ensitive applications and w here the externally supplied clock is of a high integrity and supplied by a low impedance source. system operating modes the devices have the ability to operate in several dif ferent modes. this range of operating modes, known as normal mode, slow mode, idle mode and sleep mode, allow the devices to run using a wi de range of dif ferent sl ow and fast cl ock source s. t he devi ces al so possess t he abi lity t o dynamically switch between dif ferent clocks and operating modes. w ith this choice of operating functions users are provided with the fexibility to ensure they obtain optimal performance from the device according to their application specifc requirements. clock sources in discussing the system clocks for the devices, they can be seen as having a dual clock mode. these dual clocks are what are known as a high oscillator and the other as a low oscillator. the high and low oscillator are the system clock sources and can be selected dynamically using the hlclk bit in the clkmod register. the high oscillator has the internal name f m whose source is selected using a confguration option from a choice of either an external crystal/resonator, external rc oscillator or external clock source. the l ow osc illator c lock sourc e, ha s t he i nternal na me f sl , whose sourc e i s a lso se lected by confguration option from a choice of either an external 32768hz oscill ator or the internal 32k_int oscillator. this internal f sl , f m clock, is further modified by the s lowc0~slowc2 bits in the clkmod register to provide the low frequency clock source f slow.
rev. 1.30 11 ? ?a??? ?? ?013 rev. 1.30 117 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu

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? ? ? ? - ? ? ? ? ? ?? ?? ? ?? ? ? ? ?? ?? ?? ? ? ? ? ? ? ? clock control register C clkmod an additi onal sub internal clock, with the internal name f sub , is a 32khz clock source which can be sourced from e ither t he i nternal 32k_int osc illator or a n e xternal 32768 hz c rystal, se lected by confguration option. t ogether with f sys /4, it is used as a clock source for certain internal functions such as the lcd driver , w atchdog timer, buzzer , r tc interrupt and t ime base interrupt. the lcd clock source is the f sub clock source divided by 8, giving a frequency of 4khz. the internal clock f s , is simply a choice of either f sub or f sys /4, using a confguration option.
rev. 1.30 118 ? a ??? ?? ? 013 rev. 1.30 119 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu operating modes after the correct clock source confguration selections are made, overall operation of the chosen clock is achieved using the clkmod register . a combination of the hlclk and idlen bits in the clkmod register and use of the halt instruction determine in which mode the device will be run. the devices can operate in the following modes. ? normal mode f m on, f slow on, f sys =f m , cpu on, f s on, f lcd on/of f depending upon the lcden bit, f wdt on/of f depending upon the wdt confguration option and wdt control register. ? slow mode0 f m of f, f slow =32k_int oscilla tor or the 32768hz oscillator , f sys =f slow , cpu on, f s on, f lcd on/of f depending upon the lcden bit, f wdt on/of f depending upon the wdt confguration option and wdt control register. ? slow mode1 f m on, f slow =f m /2~f m /64, f sys =f slow , cpu on, f s on, f lcd on/of f depending upon the lcden bit, f wdt on/off depending upon the wdt confguration option and wdt control register. ? idle mode f m , f slow , f sys of f, cpu of f; f sub on, f s on/ off by sel ecting f sub or f sys /4, f lcd on/ off de pending upon the lcden bit, f wdt on/of f depending upon the wdt configuration option and wdt control register. ? sleep mode f m , f slow , f sys , f s , f lcd of f, cpu of f; f sub , f wdt on/ off de pending upon t he w dt c onfiguration option and wdt control register.
rev. 1.30 118 ?a??? ?? ?013 rev. 1.30 119 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu

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rev. 1.30 1?0 ?a??? ?? ?013 rev. 1.30 1 ? 1 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu power down mode and wake-up power down mode all of the holtek microcontrollers have the ability to enter a power down mode. when the device enters this mode, the normal operat ing current, will be reduced to an extremely low standby current level. this occurs because when the device enters the power down mode, the system oscillator is stopped which reduces the power consumption to extremely low levels, however , as the device maintains i ts prese nt i nternal c ondition, it ca n be woken up a t a l ater st age a nd cont inue running, without requiring a full res et. this feature is extremely important in application areas w here the mcu must have its power supply constantly maintained to keep the device in a known condition but where the power supply capacity is limited such as in battery applications. entering the power down mode there is only one way for the device to enter the power down mode and that is to execute the halt instructio n in the applicatio n program. when this instruction is executed, the following will occur: ? the system oscillator will stop running and the application program will stop at the hal t instruction. ? the data memory contents and registers will maintain their present condition. ? the wdt will be cleared and resume counting if the wdt clock source is selected to come from the wdt oscillator. the wdt will stop if its clock source originates from the system clock. ? the i/o ports will maintain their present condition. ? in the status register , the power down fag, pdf , will be set and the w atchdog time-out fag, t o, will be cleared. standby current considerations as the main reason for entering the power down mode is to keep the current consumption of the mcu to as low a value as possible, perhaps only in the order of several micro-amps, there are other conside rations whic h m ust al so be ta ken int o ac count by the ci rcuit desi gner i f t he power consumption is to be minimized. special attention must be made to the i/o pins on the device. all high-impedance input pins must be connected to either a fxed high or low level as any foating input pins could create internal oscillations and result in increased current consumption. this also applies to devices which have dif ferent package types, as there may be undonbed pins, which must either be setup as outputs or if setup as inputs must have pull-high resistors connected. care must also be taken with the loads, which are connected to i/o pins, which are setup as outputs. these should be placed in a condition in which minimum current is drawn or connected only to external circuits that do not draw current, such as other cmos inputs. also note that additional standby current will also be required if the confguration options have enabled the w atchdog t imer internal oscillator.
rev. 1.30 1 ?? ? a ??? ?? ? 013 rev. 1.30 1?3 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu wake-up after the system enters the power down mode, it can be woken up from one of various sources listed as follows: ? an external reset ? an external falling edge on port a ? a system interrupt ? a wdt overfow if the system is woken up by an external reset, the device will experience a full system reset, however, if the device is woken up by a wdt overfow , a w atchdog t imer reset will be initiated. although both of these wake-up methods will initiate a reset operation, the actual source of the wake-up can be determined by examining the t o and pdf flags. the pdf flag is cleared by a system power -up or executing the clear w atchdog t imer instructions and is set when executing the halt instructio n. the t o fag is set if a wdt time-out occurs, and causes a wake-up that only resets the program counter and stack pointer, the other fags remain in their original status. each pin on port a can be setup via an individual confguration option to permit a negative transition on the pin to w ake-up the s ystem. when a p ort a pin w ake-up occurs , the program w ill resume execution at the instruction following the halt instruction. if the system is woken up by an inte rrupt, then two possible situations may occur . the frst is where the related interrupt is disabled or the interrupt is enabled but the stack is full, in which case the program will resume execution at the instruction following the hal t instruction. in this situation, the interrupt which woke-up the device will not be immediately service d, but will rather be serviced later wh en t he r elated i nterrupt i s f inally e nabled o r wh en a st ack l evel b ecomes f ree. t he o ther situation is where the related interrupt is enabled and the stack is not full, in which case the regular interrupt response takes place. if an interrupt request fag is set to 1 before entering the power down mode, the wake-up function of the related interrupt will be disabled. no matter what the source of the wake-up event is, once a wake-up situation occurs, a time period equal to 1024 system clock periods will be required before normal system operation res umes. however, if the wake-up has originated due to an interrupt, the actual interrupt subroutine execution will be delayed by an additional one or more cycles. if the wake-up results in the execution of the next instruction following the hal t instruction, this will be executed immediately after the 1024 system clock period delay has ended.
rev. 1.30 1?? ?a??? ?? ?013 rev. 1.30 1 ? 3 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu low voltage detector ? lvd the low v oltage detect internal function provides a means for the user to monitor when the power supply voltage falls below a certain fxed level as specifed in the dc characteristics. lvd operation the l vd function must be frst enabled via a confguration option after which bits 3 and 5 of the rtcc register are used to control the overall function of the l vd. bit 3 is the enable/disable control bit and is known as l vdc, when set low the overall function of the l vd will be disabled. bit 5 is the l vd detector output bit and is known as l vdo. under normal operation, and when the power supply voltage is above the specifed v lvd value in the dc characteristi c section, the l vdo bit will remain at a zero value. if the power supply voltage should fall below this v lvd value then the l vdo bit will change to a high value indicating a low voltage condition. note that the l vdo bit is a read- only bi t. by pol ling t he l vdo bi t i n t he r tcc re gister, t he a pplication progra m c an t herefore determine the presence of a low voltage condition. after power -on, or after a reset, the l vd will be switched of f by clearin g the l vdc bit in the r tcc register to zero. note that if the l vd is enabled there will be some power consumption associated with its internal circuitry , however , by clearing the l vdc bit to zero the power can be minimised. it is important not to confuse the l vd with the l vr function. in the l vr function an automatic reset will be generated by the microcontroller , whereas in the l vd function only the l vdo bit will be affected with no infuence on other microcontroller functions. there are a range of voltage values, selected using a confguration option, which can be chosen to activate the lvd.
rev. 1.30 1 ? 4 ? a ??? ?? ? 013 rev. 1.30 1?5 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu watchdog timer the w atchdog t imer is provided to prevent program malfunctions or sequences from jumping to unknown location s, due to certain uncontrollable external events such as electrical noise. it operates by providing a device reset when the w atchdog t imer counter overfows. watchdog timer operation the w atchdog t imer clock source is provided by the internal clock, f s , which is in turn supplied by one of two sources selected by confguration option: f sub or f sys /4. note that if the w atchdog t imer confguration option has been disabled, then any instruction relating to its operation will result in no operation. most of the w atchdog t imer options, such as enable/disable, w atchdog t imer clock source and clear instruction type are selected using confguration options. in addit ion to a confguration option to enable the w atchdog t imer, there are four bits, wdten3~wdten0, in the misc register to offer an additiona l enable control of the w atchdog t imer. these bits must be set to a specifc value of 1010 to disable the w atchdog t imer. any other values for these bits will keep the w atchdog timer enabled. after power on these bits will have the disabled value of 1010. one of the wdt clock sources is the internal f sub , which can be sourced from either the 32k_int internal os cillator or the 32768h z os cillator. the 32k _int internal os cillator has an approximate period of 31.2s at a supply voltage of 5v . however , it should be noted that this specifed internal clock period can vary with v dd , temperature and process variations. the 32768hz oscillator is supplied by an external 32768hz crystal. the other w atchdog t imer clock source option is the f sys /4 clock. whether the w atchdog t imer clock source is its own internal 32k_int , the 32768hz oscillator or f sys /4, it is divided by 2 13 ~2 16 , using configuration option to obtain the required watchdog t imer time-out period. the max time out period is when the 2 16 option is selected. this time-out period may vary with temperature, v dd and process variations. as the clear instruction only resets the last stage of the divider chain, for this reason the actual division ratio and corresponding watchdog t imer t ime-out c an va ry by a fa ctor of t wo. t he e xact di vision ra tio de pends upon t he residual value in the w atchdog t imer counter before the clear instruction is executed. if the f sys /4 clock is used as the w atchdog t imer clock source, it should be noted that when the system enters the power down mode, then the instruction clock is stopped and the w atchdog t imer will lose its protecting purposes. for systems that operate in noisy environments, using the 32k_int rc oscillator is strongly recommended.

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rev. 1.30 1?4 ?a??? ?? ?013 rev. 1.30 1 ? 5 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu under norm al progra m ope ration, a w atchdog t imer t ime-out wi ll i nitialise a de vice re set a nd se t the status bit t o. however , if the system is in the power down mode, when a w atchdog t imer time-out occurs, the t o bit in the status register will be set and only the program counter and stack pointer will be reset. three methods can be adopted to clear the contents of the w atchdog t imer. the frst is an exte rnal hardware reset, which means a low level on the res pin, the second is using the watchdog software instructions and the third is via a halt instruction. clearing the watchdog timer there are two methods of using software instructions to clear the w atchdog t imer, one of which must be chosen by confguration option. the frst option is to use the single clr wdt instruction while the second is to use the two commands clr wdt1 and clr wdt2. for the first option, a simple execution of clr wdt will clear the wdt while for the second option, both clr wdt1 and clr wdt2 must both be executed to successfully clear the w atchdog t imer. note that for this second option, if clr wdt1 is used to clear the w atchdog t imer, successive executions of this instruction will have no ef fect, only the execution of a clr wdt2 instruction will clear the w atchdog t imer. similarly after the clr wdt2 instruction has been executed, only a successive clr wdt1 instruction can clear the w atchdog t imer.
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rev. 1.30 1 ?? ? a ??? ?? ? 013 rev. 1.30 1?7 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu confguration options confguration options refer to certa in options within the mcu that are programmed into the device during the programming process. during the development process, these options are selected using the ht -ide software development tools. as these options are programmed into the device using the hardware programming tools, once they are selected they cannot be changed later as the application software has no control over the configuration options. all options must be defined for proper system function, the details of which are shown in the table. no. options oscillator options 1 high oscillator type selection ? f ? 1. exte ? nal c ? ystal os ? illato ? ? . exte ? nal rc os ? illato ? 3. externally supplied clock ? internal flter on 4. externally supplied clock ? internal flter off ? f sub ? lo ? k sele ? tion: 1. 32768hz external oscillator 2. 32k_int internal oscillator 3 f s ? lo ? k sele ? tion: f sub o ? f sys /4 4 xtal mode selection: 455khz or 1m~12mhz 5 32768hz crystal: enable or disable pfd options ? pa3: no ? mal i/o o ? pfd output 7 pfd ? lo ? k sele ? tion: time ? /event counte ? 0 o ? time ? /event counte ? 1 buzzer options 8 pa0/pa1: no ? mal i/o o ? bz/ bz o ? pa0=bz and pa1 as no ? mal i/o 9 buzzer frequency: f s / ? ? ? f s / ? 3 ? f s / ? 4 ? f s / ? 5 ? f s / ? ? ? f s / ? 7 ? f s / ? 8 ? f s / ? 9 time base option 10 time base time-out pe ? iod: ? 1 ? /f s ? ? 13 /f s ? ? 14 /f s ? ? 15 /f s ? lcd option 11 lcd type: r or c ? HT56R62/ht56r65 only watchdog options 1 ? wat ?? dog time ? fun ? tion: enable o ? disable 13 clrwdt inst ? u ? tions: 1 o ? ? inst ? u ? tions 14 wdt time-out pe ? iod: ? 1 ? /f s ~ ? 13 /f s ? ? 13 /f s ~ ? 14 /f s ? ? 14 /f s ~ ? 15 /f s ? ? 15 /f s ~ ? 1 ? /f s lvd/lvr options 15 lvd fun ? tion: enable o ? disable 1 ? lvr fun ? tion: enable o ? disable 17 lvr/lvd voltage: ? .1v/ ? . ? v o ? 3.15v/3.3v o ? 4. ? v/4.4v spi options 18 si ? pin enable/disable 19 spi_wcol: enable/disable ? 0 spi_csen: enable/disable, used to enable/disable (1/0) software csen function i 2 c option ? 1 i ? c deboun ? e time: no deboun ? e ? 1 system ? lo ? k deboun ? e ? ? system ? lo ? k deboun ? e pint option ?? exte ? nal pe ? ip ? e ? al inte ?? upt o ? segment fun ? tion timer/event counter and external interrupt pins filter option ? 3 interrupt and timer/event counter input pins internal flter on/off control ? applies to all pins lock options ? 4 lo ? k all ? 5 pa ? tial lo ? k
rev. 1.30 1?? ?a??? ?? ?013 rev. 1.30 1 ? 7 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu application circuits application circuit for HT56R62/ht56r65

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rev. 1.30 1?8 ?a??? ?? ?013 rev. 1.30 1 ? 9 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu instruction set introduction central to the successful operation of any microcontroller is its instruction set, which is a set of program instruction codes that direc ts the microcontroller to perform certain operations. in the case of holtek microcontroller , a comprehensive and fexible set of over 60 instructions is provided to enable programmers to implement their application with the minimum of programming overheads. for easier understanding of the various instruction codes, they have been subdivided into several functional groupings. instruction timing most instructions are implemented within one instruction cycle. the exceptions to this are branch, call, or table read instructions where two ins truction cycles are required. one instruction cycle is equal to 4 system clock cycles, therefore in the case of an 8mhz system oscillator , most instructions would be i mplemented wi thin 0.5 s a nd bra nch or c all i nstructions woul d be i mplemented wi thin 1s. although instructions which require one more cycle to implement are generally limited to the jmp , call, ret , reti and table read instructions, it is important to realize that any other instructions which involve manipulation of the program counter low register or pcl will also take one more cycle to implement. as instructions which change the contents of the pcl will imply a direct j ump t o t hat ne w a ddress, one m ore c ycle wi ll be re quired. e xamples of suc h i nstructions would be clr pcl or mov pcl, a. for the case of skip instructions, it must be noted that if the result of the comparison involves a skip operation then this will also take one more cycle, if no skip is involved then only one cycle is required. moving and transferring data the t ransfer of da ta wi thin t he m icrocontroller progra m i s one of t he m ost fre quently use d operations. making use of three kinds of mov instructions, data can be transferred from registers to the accumulator and vice-versa as well as being able to move specifc immediate data directly into the ac cumulator. one of t he m ost i mportant da ta t ransfer a pplications i s t o re ceive da ta from t he input ports and transfer data to the output ports. arithmetic operations the ability to perform certain arithm etic operations and data manipula tion is a necessary feature of most m icrocontroller a pplications. w ithin t he hol tek m icrocontroller i nstruction se t a re a ra nge of add and subtract instruction mnemonics to enable the necessary arithmetic to be carried out. care must be taken to ens ure correct handling of carry and borrow data w hen res ults exceed 255 for addition and less than 0 for subtraction. the increment and decrement instructions inc, inca, dec and deca provide a simple means of increasing or decreasing by a value of one of the values in the destination specifed.
rev. 1.30 130 ? a ??? ?? ? 013 rev. 1.30 131 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu logical and rotate operation the standard logical operations such as and, or, xor and cpl all have their own instruction within t he hol tek m icrocontroller i nstruction set . as wi th t he c ase of m ost i nstructions i nvolving data m anipulation, d ata m ust p ass t hrough t he ac cumulator wh ich m ay i nvolve a dditional programming steps. in all logical data operations, the zero flag may be set if the result of the operation is zero. another form of logical data manipulation comes from the rotate instructions such as rr, rl, rrc and rlc which provide a simple means of rotating one bit right or left. dif ferent rotate instructions exist depending on program requirements. rotate instructions are useful for serial port progra mming a pplications whe re da ta c an be rot ated from a n i nternal re gister i nto t he ca rry bit from where it can be examined and the necessary serial bit set high or low . another application which rotate data operations are used is to implement multiplication and division calculations. branches and control transfer program branching takes the form of either jumps to specifed locations using the jmp instruction or t o a su broutine usi ng t he cal l i nstruction. t hey di ffer i n t he se nse t hat i n t he c ase of a subroutine call, the program mus t return to the ins truction immediately w hen the s ubroutine has been c arried out. t his i s done by pl acing a re turn i nstruction ret i n t he subrout ine whi ch wi ll cause the program to jump back to the address right after the call instruction. in the case of a jmp instruction, the program simply jumps to the desired location. there is no requirement to jump back to the original jumping of f point as in the case of the call instruction. one special and extremely useful set of branch instructions are the conditional branches. here a decision is frst made regarding the c ondition of a c ertain da ta m emory or i ndividual bi ts. de pending upon t he c onditions, t he program will continue with the next instruction or skip over it and jump to the following instruction. these i nstructions a re t he ke y t o de cision m aking a nd bra nching wi thin t he progra m pe rhaps determined by the condition of certain input switches or by the condition of internal data bits. bit operations the abili ty to provide single bit operations on data memory is an extremely fexible feature of all holtek microcontrollers. this feature is especially useful for output port bit programming where individual bits or port pins can be directly set high or low using either the set [m].i or clr [m].i instructions respectively . the feature removes the need for programmers to frst read the 8-bit output port, manipulate the input data to ensure that other bits are not changed and then output the port with the correct new data. this read-modify-write process is taken care of automatically when these bit operation instructions are used. table read operations data st orage i s norm ally i mplemented by usi ng re gisters. howeve r, whe n working wi th l arge amounts of fxed data, the volume involved often makes it inconvenient to store the fxed data in the data memory . t o overcome this problem, holtek microcontrollers allow an area of program memory to be setup as a table where data can be directly stored. a set of easy to use instructions provides the means by w hich this fixed data can be referenced and retrieved from the program memory. other operations in addition to the above functional instructions, a range of other instructions also exist such as the hal t instruction for power -down operations and instructions to control the operation of the w atchdog t imer for reliable program operations under extreme electric or electromagnetic environments. for their relevant operations, refer to the functional related sections.
rev. 1.30 130 ?a??? ?? ?013 rev. 1.30 131 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu instruction set summary the following table depicts a summary of the instruction set categorised according to function and can be consulted as a basic instruction reference using the following listed conventions. table conventions x: bits immediate data m: data memory address a: accumulator i: 0~7 number of bits addr: program memory address mnemonic description cycles flag affected arithmetic add a ? [m] add data ? emo ? y to acc 1 z ? c ? ac ? ov add ? a ? [m] add acc to data ? emo ? y 1 note z ? c ? ac ? ov add a ? x add immediate data to acc 1 z ? c ? ac ? ov adc a ? [m] add data ? emo ? y to acc wit ? ca ?? y 1 z ? c ? ac ? ov adc ? a ? [m] add acc to data memo ? y wit ? ca ?? y 1 note z ? c ? ac ? ov sub a ? x subt ? a ? t immediate data f ? om t ? e acc 1 z ? c ? ac ? ov sub a ? [m] subt ? a ? t data ? emo ? y f ? om acc 1 z ? c ? ac ? ov sub ? a ? [m] subt ? a ? t data ? emo ? y f ? om acc wit ? ? esult in data ? emo ? y 1 note z ? c ? ac ? ov sbc a ? [m] subt ? a ? t data ? emo ? y f ? om acc wit ? ca ?? y 1 z ? c ? ac ? ov sbc ? a ? [m] subt ? a ? t data ? emo ? y f ? om acc wit ? ca ?? y ? ? esult in data ? emo ? y 1 note z ? c ? ac ? ov daa [m] de ? imal adjust acc fo ? addition wit ? ? esult in data ? emo ? y 1 note c logic operation and a,[m] logical and data memory to acc 1 z or a ? [m] logi ? al or data ? emo ? y to acc 1 z xor a ? [m] logi ? al xor data ? emo ? y to acc 1 z andm a,[m] logical and acc to data memory 1 note z or ? a ? [m] logi ? al or acc to data ? emo ? y 1 note z xor ? a ? [m] logi ? al xor acc to data ? emo ? y 1 note z and a,x logical and immediate data to acc 1 z or a ? x logi ? al or immediate data to acc 1 z xor a ? x logi ? al xor immediate data to acc 1 z cpl [m] complement data ? emo ? y 1 note z cpla [m] complement data ? emo ? y wit ? ? esult in acc 1 z increment & decrement inca [m] in ?? ement data ? emo ? y wit ? ? esult in acc 1 z inc [m] in ?? ement data ? emo ? y 1 note z deca [m] de ?? ement data ? emo ? y wit ? ? esult in acc 1 z dec [m] de ?? ement data ? emo ? y 1 note z rotate rra [m] rotate data ? emo ? y ? ig ? t wit ? ? esult in acc 1 none rr [m] rotate data ? emo ? y ? ig ? t 1 note none rrca [m] rotate data ? emo ? y ? ig ? t t ?? oug ? ca ?? y wit ? ? esult in acc 1 c rrc [m] rotate data ? emo ? y ? ig ? t t ?? oug ? ca ?? y 1 note c rla [m] rotate data ? emo ? y left wit ? ? esult in acc 1 none rl [m] rotate data ? emo ? y left 1 note none rlca [m] rotate data ? emo ? y left t ?? oug ? ca ?? y wit ? ? esult in acc 1 c rlc [m] rotate data ? emo ? y left t ?? oug ? ca ?? y 1 note c
rev. 1.30 13 ? ? a ??? ?? ? 013 rev. 1.30 133 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu mnemonic description cycles flag affected data move ? ov a ? [m] ? ove data ? emo ? y to acc 1 none ? ov [m] ? a ? ove acc to data ? emo ? y 1 note none ? ov a ? x ? ove immediate data to acc 1 none bit operation clr [m].i clea ? bit of data ? emo ? y 1 note none set [m].i set bit of data ? emo ? y 1 note none branch j ? p add ? jump un ? onditionally ? none sz [m] skip if data memory is zero 1 note none sza [m] skip if data memory is zero with data movement to acc 1 note none sz [m].i skip if bit i of data memory is zero 1 note none snz [m].i skip if bit i of data memory is not zero 1 note none siz [m] skip if increment data memory is zero 1 note none sdz [m] skip if decrement data memory is zero 1 note none siza [m] skip if increment data memory is zero with result in acc 1 note none sdza [m] skip if decrement data memory is zero with result in acc 1 note none call add ? sub ? outine ? all ? none ret retu ? n f ? om sub ? outine ? none ret a ? x retu ? n f ? om sub ? outine and load immediate data to acc ? none reti retu ? n f ? om inte ?? upt ? none table read tabrd [m] read table to tblh and data memory ? note none tabrdl [m] read table (last page) to tblh and data memory ? note none miscellaneous nop no operation 1 none clr [m] clea ? data ? emo ? y 1 note none set [m] set data ? emo ? y 1 note none clr wdt clea ? wat ?? dog time ? 1 to ? pdf clr wdt1 p ? e- ? lea ? wat ?? dog time ? 1 to ? pdf clr wdt ? p ? e- ? lea ? wat ?? dog time ? 1 to ? pdf swap [m] swap nibbles of data ? emo ? y 1 note none swapa [m] swap nibbles of data ? emo ? y wit ? ? esult in acc 1 none halt ente ? powe ? down mode 1 to ? pdf note: 1. for skip instructions, if the result of the comparison involves a skip then two cycles are required, if no skip takes place only one cycle is required. 2. any instruction which changes the contents of the pcl will also require 2 cycles for execution. 3. for the clr wdt1 and clr wdt2 instructions the t o and pdf flags may be af fected by the execution st atus. t he t o a nd pdf fl ags a re c leared a fter bot h clr w dt1 a nd clr w dt2 instructions are consecutively executed. otherwise the t o and pdf fags remain unchanged.
rev. 1.30 13? ?a??? ?? ?013 rev. 1.30 133 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu instruction defnition adc a,[m] add d ata m emory to a cc w ith carry description the c ontents o f t he s pecifed d ata m emory, a ccumulator a nd t he c arry f ag a re a dded. the re sult is s tored in t he a ccumulator. operation acc a cc + [ m] + c affected f ag(s) ov, z , a c, c adcm a,[m] add a cc to d ata m emory w ith carry description the c ontents o f t he s pecifed d ata m emory, a ccumulator a nd t he c arry f ag a re a dded. the re sult is s tored in t he sp ecifed d ata m emory. operation [m] a cc + [ m] + c affected f ag(s) ov, z , a c, c add a,[m] add d ata m emory t o a cc description the c ontents o f t he s pecifed d ata m emory a nd t he a ccumulator a re a dded. the re sult is s tored in t he a ccumulator. operation acc a cc + [ m] affected f ag(s) ov, z , a c, c add a,x add im mediate data to a cc description the c ontents o f t he a ccumulator a nd t he s pecifed im mediate data a re a dded. the re sult is s tored in t he a ccumulator. operation acc a cc + x affected f ag(s) ov, z , a c, c addm a,[m] add a cc to d ata m emory description the c ontents o f t he s pecifed d ata m emory a nd t he a ccumulator a re a dded. the re sult is s tored in t he sp ecifed d ata m emory. operation [m] a cc + [ m] affected f ag(s) ov, z , a c, c and a,[m] logical a nd d ata m emory t o a cc description data i n t he a ccumulator a nd t he s pecifed d ata m emory p erform a b itwise l ogical a nd operation. t he re sult is s tored in t he a ccumulator. operation acc a cc a nd [ m] affected f ag(s) z and a,x logical a nd im mediate data to a cc description data i n t he a ccumulator a nd t he s pecifed im mediate data p erform a b it w ise l ogical a nd operation. t he re sult is s tored in t he a ccumulator. operation acc a cc a nd x affected f ag(s) z andm a,[m] logical a nd a cc to d ata m emory description data i n t he s pecifed d ata m emory a nd t he a ccumulator p erform a b itwise l ogical a nd operation. t he re sult is s tored in t he d ata m emory. operation [m] a cc and [ m] affected f ag(s) z
rev. 1.30 134 ? a ??? ?? ? 013 rev. 1.30 135 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu call addr subroutine c all description unconditionally c alls a s ubroutine a t t he s pecifed a ddress. th e p rogram c ounter t hen increments b y 1 to o btain t he a ddress o f t he n ext i nstruction w hich i s t hen p ushed o nto t he stack. t he sp ecifed a ddress is t hen loaded a nd t he p rogram c ontinues e xecution f rom t his new a ddress. a s t his instruction re quires a n a dditional op eration, it is a t wo c ycle instruction. operation stack p rogram counter + 1 program c ounter a ddr affected f ag(s) none clr [m] clear d ata m emory description each b it o f t he s pecifed d ata m emory i s cl eared t o 0 . operation [m] 00h affected f ag(s) none clr [m].i clear bi t o f d ata m emory description bit i o f t he s pecifed d ata m emory i s cl eared t o 0 . operation [m].i 0 affected f ag(s) none clr wdt clear w atchdog t imer description the t o, p df f ags a nd t he w dt a re al l c leared. operation wdt cl eared to 0 pdf 0 affected f ag(s) to, p df clr wdt1 pre-clear w atchdog t imer description the t o, p df f ags a nd t he w dt a re a ll c leared. n ote t hat t his instruction w orks in conjunction w ith c lr w dt2 a nd m ust b e e xecuted al ternately w ith c lr w dt2 to h ave effect. r epetitively e xecuting t his i nstruction w ithout al ternately e xecuting c lr w dt2 w ill have no e ffect. operation wdt cl eared to 0 pdf 0 affected f ag(s) to, p df clr wdt2 pre-clear w atchdog t imer description the t o, p df f ags and t he w dt are all cleared. n ote t hat t his i nstruction w orks i n conjunction with c lr w dt1 a nd m ust b e e xecuted al ternately w ith c lr w dt1 to h ave e ffect. r epetitively e xecuting t his i nstruction w ithout al ternately e xecuting c lr w dt1 w ill h ave n o e ffect. operation wdt cl eared to 0 pdf 0 affected f ag(s) to, p df cpl [m] complement d ata m emory description each b it of t he s pecifed d ata m emory i s l ogically complemented ( 1s complement). b its w hich previously c ontained a 1 a re c hanged to 0 a nd v ice v ersa. operation [m] [m] affected f ag(s) z
rev. 1.30 134 ?a??? ?? ?013 rev. 1.30 135 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu cpla [m] complement d ata m emory w ith r esult i n a cc description each b it of t he s pecifed d ata m emory i s l ogically complemented ( 1s complement). b its w hich previously c ontained a 1 a re c hanged to 0 a nd v ice v ersa. th e c omplemented r esult i s s tored i n the a ccumulator a nd t he c ontents o f t he d ata m emory r emain u nchanged. operation acc [ m] affected f ag(s) z daa [m] decimal-adjust a cc f or addition w ith r esult i n d ata m emory description convert t he c ontents o f t he a ccumulator v alue to a b cd ( binary c oded d ecimal) v alue resulting f rom t he p revious a ddition o f t wo b cd v ariables. i f t he low n ibble is greater t han 9 or i f a c f ag i s s et, t hen a v alue o f 6 w ill b e a dded to t he l ow n ibble. o therwise t he l ow n ibble remains u nchanged. i f t he h igh n ibble i s g reater t han 9 o r i f t he c f ag i s s et, t hen a v alue o f 6 will b e a dded to t he h igh n ibble. e ssentially, t he decimal c onversion i s p erformed b y a dding 00h, 0 6h, 6 0h o r 6 6h depending o n t he a ccumulator a nd f ag c onditions. o nly t he c f ag may b e a ffected b y t his instruction w hich indicates t hat if t he o riginal b cd s um is greater t han 100, it al lows m ultiple p recision decimal a ddition. operation [m] a cc + 00h or [m] a cc + 06 h o r [m] a cc + 60h o r [m] a cc + 66h affected f ag(s) c dec [m] decrement d ata m emory description data i n t he s pecifed d ata m emory i s d ecremented b y 1 . operation [m] [ m] ? 1 affected f ag(s) z deca [ m] decrement d ata m emory wi th r esult i n a cc description data in t he sp ecifed d ata m emory is d ecremented b y 1 . t he re sult is s tored in t he accumulator. th e c ontents o f t he d ata m emory r emain u nchanged. operation acc [ m] ? 1 affected f ag(s) z halt enter p ower down m ode description this i nstruction s tops t he p rogram e xecution a nd t urns o ff t he s ystem c lock. th e c ontents o f the d ata m emory a nd r egisters a re r etained. th e w dt a nd p rescaler a re c leared. th e p ower down f ag p df i s s et a nd t he w dt t ime-out f ag t o i s c leared. operation to 0 pdf 1 affected f ag(s) to, p df inc [m] increment d ata m emory description data in t he sp ecifed d ata m emory is incremented b y 1 . operation [m] [ m] + 1 affected f ag(s) z inca [m] increment d ata m emory wi th r esult i n a cc description data i n t he sp ecifed d ata m emory i s i ncremented b y 1 . th e re sult i s s tored i n t he a ccumulator. the c ontents o f t he d ata m emory r emain u nchanged. operation acc [ m] + 1 affected f ag(s) z
rev. 1.30 13 ? ? a ??? ?? ? 013 rev. 1.30 137 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu jmp addr jump u nconditionally description the c ontents o f t he p rogram c ounter a re re placed w ith t he sp ecifed a ddress. p rogram execution t hen c ontinues f rom t his n ew a ddress. a s t his re quires t he insertion o f a d ummy instruction w hile t he n ew a ddress is loaded, it is a t wo c ycle instruction. operation program counter addr affected f ag(s) none mov a,[m] move d ata m emory t o a cc description the c ontents o f t he s pecifed d ata m emory a re c opied to t he a ccumulator. operation acc [ m] affected f ag(s) none mov a,x move im mediate data to a cc description the im mediate data s pecifed i s l oaded i nto t he a ccumulator. operation acc x affected f ag(s) none mov [m],a move a cc to d ata m emory description the c ontents o f t he a ccumulator a re c opied to t he s pecifed d ata m emory. operation [m] a cc affected f ag(s) none nop no o peration description no o peration i s p erformed. e xecution c ontinues w ith t he n ext i nstruction. operation no operation affected f ag(s) none or a,[m] logical o r d ata m emory to a cc description data i n t he a ccumulator a nd t he s pecifed d ata m emory p erform a b itwise logical o r op eration. t he re sult is s tored in t he a ccumulator. operation acc a cc or [ m] affected f ag(s) z or a,x logical or im mediate data to a cc description data i n t he a ccumulator a nd t he s pecifed im mediate data p erform a b itwise l ogical o r operation. t he re sult is s tored in t he a ccumulator. operation acc a cc or x affected f ag(s) z orm a,[m] logical or a cc to d ata m emory description data i n t he s pecifed d ata m emory a nd t he a ccumulator p erform a b itwise l ogical o r operation. t he re sult is s tored in t he d ata m emory. operation [m] a cc or [ m] affected f ag(s) z ret return from s ubroutine description the p rogram c ounter is re stored f rom t he s tack. p rogram e xecution c ontinues a t t he re stored a ddress. operation program counter s tack affected f ag(s) none
rev. 1.30 13? ?a??? ?? ?013 rev. 1.30 137 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu ret a,x return f rom su broutine and l oad im mediate data to a cc description the p rogram c ounter i s r estored f rom t he s tack a nd t he a ccumulator l oaded w ith t he s pecifed immediate data. p rogram e xecution c ontinues a t t he r estored a ddress. operation program counter s tack acc x affected f ag(s) none reti return from i nterrupt description the p rogram c ounter is re stored f rom t he s tack a nd t he interrupts a re re -enabled b y s etting t he emi b it. e mi i s t he m aster i nterrupt g lobal e nable b it. i f a n i nterrupt w as p ending w hen t he reti instruction is e xecuted, t he p ending in terrupt ro utine w ill b e p rocessed b efore re turning to t he m ain p rogram. operation program counter s tack emi 1 affected f ag(s) none rl [m] rotate d ata m emory l eft description the c ontents o f t he s pecifed d ata m emory a re r otated l eft b y 1 b it w ith b it 7 r otated i nto b it 0 . operation [m].(i+1) [ m].i; (i=0~6) [m].0 [ m].7 affected f ag(s) none rla [m] rotate d ata m emory left w ith re sult in a cc description the c ontents o f t he s pecifed d ata m emory a re r otated l eft b y 1 b it w ith b it 7 r otated i nto b it 0 . the r otated r esult i s s tored i n t he a ccumulator a nd t he c ontents o f t he d ata m emory r emain u nchanged. operation acc.(i+1) [ m].i; (i=0~6) acc.0 [ m].7 affected f ag(s) none rlc [m] rotate d ata m emory l eft t hrough carry description the c ontents o f t he s pecifed d ata m emory a nd t he c arry f ag a re r otated l eft b y 1 b it. b it 7 replaces t he c arry b it a nd t he o riginal c arry f ag i s r otated i nto b it 0 . operation [m].(i+1) [ m].i; (i=0~6) [m].0 c c [ m].7 affected f ag(s) c rlca [m] rotate d ata m emory left t hrough c arry w ith re sult in a cc description data i n t he s pecifed d ata m emory and t he carry f ag are r otated l eft b y 1 b it. b it 7 r eplaces t he carry b it a nd t he o riginal c arry f ag i s r otated i nto t he b it 0 . th e r otated r esult i s s tored i n t he accumulator a nd t he c ontents o f t he d ata m emory r emain u nchanged. operation acc.(i+1) [ m].i; (i=0~6) acc.0 c c [ m].7 affected f ag(s) c rr [m] rotate d ata m emory r ight description the contents of t he s pecifed d ata m emory are r otated r ight b y 1 b it w ith b it 0 r otated i nto b it 7 . operation [m].i [ m].(i+1); (i=0~6) [m].7 [ m].0 affected f ag(s) none
rev. 1.30 138 ? a ??? ?? ? 013 rev. 1.30 139 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu rra [m] rotate d ata m emory right with result i n a cc description data i n t he s pecifed d ata m emory a nd t he c arry f ag a re r otated r ight b y 1 b it w ith b it 0 rotated i nto b it 7 . th e r otated r esult i s s tored i n t he a ccumulator a nd t he c ontents o f t he data m emory r emain u nchanged. operation acc.i [ m].(i+1); (i=0~6) acc.7 [ m].0 affected f ag(s) none rrc [m] rotate d ata m emory r ight t hrough carry description the c ontents o f t he s pecifed d ata m emory a nd t he c arry f ag a re r otated r ight b y 1 b it. b it 0 replaces t he c arry b it a nd t he o riginal c arry f ag i s r otated i nto b it 7 . operation [m].i [ m].(i+1); (i=0~6) [m].7 c c [ m].0 affected f ag(s) c rrca [m] rotate d ata m emory right th rough c arry with result i n a cc description data i n t he s pecifed d ata m emory a nd t he c arry f ag a re r otated r ight b y 1 b it. b it 0 r eplaces the c arry b it a nd t he o riginal c arry f ag i s r otated i nto b it 7 . th e r otated r esult i s s tored i n t he accumulator a nd t he c ontents o f t he d ata m emory r emain u nchanged. operation acc.i [ m].(i+1); (i=0~6) acc.7 c c [ m].0 affected f ag(s) c sbc a,[m] subtract d ata m emory from a cc wi th c arry description the c ontents o f t he s pecifed d ata m emory a nd t he c omplement o f t he c arry f ag a re subtracted f rom t he a ccumulator. t he re sult is s tored in t he a ccumulator. n ote t hat if t he result o f s ubtraction is n egative, t he c f ag w ill b e c leared t o 0 , o therwise if t he re sult is positive o r z ero, t he c f ag w ill b e s et to 1 . operation acc a cc ? [ m] ? c affected f ag(s) ov, z , a c, c sbcm a,[m] subtract d ata m emory from a cc wi th c arry a nd r esult i n d ata m emory description the c ontents o f t he s pecifed d ata m emory a nd t he c omplement o f t he c arry f ag a re subtracted f rom t he a ccumulator. t he re sult is s tored in t he d ata m emory. n ote t hat if t he result o f s ubtraction is n egative, t he c f ag w ill b e c leared t o 0 , o therwise if t he re sult is positive o r z ero, t he c f ag w ill b e s et to 1 . operation [m] a cc ? [ m] ? c affected f ag(s) ov, z , a c, c sdz [m] skip i f decrement d ata m emory i s 0 description the c ontents o f t he s pecifed d ata m emory a re fr st decremented b y 1 . i f t he r esult i s 0 t he following instruction is s kipped. a s t his re quires t he insertion o f a d ummy instruction w hile the n ext instruction is f etched, it is a t wo c ycle instruction. i f t he re sult is n ot 0 t he p rogram proceeds w ith t he f ollowing i nstruction. operation [m] [ m] ? 1 skip if [ m]=0 affected f ag(s) none
rev. 1.30 138 ?a??? ?? ?013 rev. 1.30 139 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu sdza [m] skip i f decrement d ata m emory i s z ero w ith r esult i n a cc description the c ontents o f t he s pecifed d ata m emory a re fr st decremented b y 1 . i f t he r esult i s 0 , t he following instruction is s kipped. t he re sult is s tored in t he a ccumulator b ut t he sp ecifed data m emory c ontents r emain u nchanged. a s t his r equires t he i nsertion o f a dummy instruction w hile t he n ext instruction is f etched, it is a t wo c ycle instruction. i f t he r esult is n ot 0 , the p rogram p roceeds w ith t he f ollowing instruction. operation acc [ m] ? 1 skip if a cc=0 affected f ag(s) none set [m] set d ata m emory description each b it o f t he s pecifed d ata m emory i s s et t o 1 . operation [m] f fh affected f ag(s) none set [m].i set b it o f d ata m emory description bit i o f t he s pecifed d ata m emory i s s et t o 1 . operation [m].i 1 affected f ag(s) none siz [m] skip i f i ncrement d ata m emory i s 0 description the c ontents o f t he sp ecifed d ata m emory a re f rst incremented b y 1 . i f t he re sult is 0 , t he following instruction is s kipped. a s t his re quires t he insertion o f a d ummy instruction w hile the n ext instruction is f etched, it is a t wo c ycle instruction. i f t he re sult is n ot 0 t he p rogram proceeds w ith t he f ollowing i nstruction. operation [m] [ m] + 1 skip if [ m]=0 affected f ag(s) none siza [m] skip if increment d ata m emory is z ero w ith re sult in a cc description the c ontents o f t he sp ecifed d ata m emory a re f rst incremented b y 1 . i f t he re sult is 0 , t he following instruction is s kipped. t he re sult is s tored in t he a ccumulator b ut t he sp ecifed data m emory c ontents r emain u nchanged. a s t his r equires t he i nsertion o f a dummy instruction w hile t he n ext instruction is f etched, it is a t wo c ycle instruction. i f t he re sult is n ot 0 t he p rogram p roceeds w ith t he f ollowing instruction. operation acc [ m] + 1 skip if a cc=0 affected f ag(s) none snz [m].i skip i f b it i of d ata m emory i s n ot 0 description if b it i o f t he sp ecifed d ata m emory is n ot 0 , t he f ollowing instruction is s kipped. a s t his requires t he insertion o f a d ummy instruction w hile t he n ext instruction is f etched, it is a t wo cycle instruction. i f t he re sult is 0 t he p rogram p roceeds w ith t he f ollowing instruction. operation skip i f [ m].i 0 affected f ag(s) none sub a,[m] subtract d ata m emory from a cc description the s pecifed d ata m emory i s s ubtracted f rom t he c ontents o f t he a ccumulator. th e r esult i s stored in t he a ccumulator. n ote t hat if t he re sult o f s ubtraction is n egative, t he c f ag w ill b e cleared to 0 , o therwise i f t he r esult i s p ositive o r z ero, t he c f ag w ill b e s et to 1 . operation acc a cc ? [ m] affected f ag(s) ov, z , a c, c
rev. 1.30 140 ? a ??? ?? ? 013 rev. 1.30 141 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu subm a,[m] subtract d ata m emory from a cc wi th r esult i n d ata m emory description the s pecifed d ata m emory i s s ubtracted f rom t he c ontents o f t he a ccumulator. th e r esult i s stored in t he d ata m emory. n ote t hat if t he re sult o f s ubtraction is n egative, t he c f ag w ill b e cleared to 0 , o therwise i f t he r esult i s p ositive o r z ero, t he c f ag w ill b e s et to 1 . operation [m] a cc ? [ m] affected f ag(s) ov, z , a c, c sub a,x subtract im mediate data f rom a cc description the im mediate data s pecifed b y t he c ode i s s ubtracted f rom t he c ontents o f t he a ccumulator. the re sult is s tored in t he a ccumulator. n ote t hat if t he re sult o f s ubtraction is n egative, t he c fag w ill b e c leared to 0 , o therwise i f t he r esult i s p ositive o r z ero, t he c f ag w ill b e s et to 1 . operation acc a cc ? x affected f ag(s) ov, z , a c, c swap [m] swap ni bbles of d ata m emory description the l ow-order a nd h igh-order n ibbles o f t he s pecifed d ata m emory a re i nterchanged. operation [m].3~[m].0 ? [ m].7~[m].4 affected f ag(s) none swapa [m] swap ni bbles of d ata m emory w ith r esult i n a cc description the l ow-order a nd h igh-order n ibbles o f t he s pecifed d ata m emory a re i nterchanged. th e result i s s tored i n t he a ccumulator. th e c ontents o f t he d ata m emory r emain u nchanged. operation acc.3~acc.0 [ m].7~[m].4 acc.7~acc.4 [ m].3~[m].0 affected f ag(s) none sz [m] skip i f d ata m emory i s 0 description if t he contents of t he s pecifed d ata m emory i s 0, t he following i nstruction i s s kipped. a s t his requires t he insertion o f a d ummy instruction w hile t he n ext instruction is f etched, it is a t wo cycle instruction. i f t he re sult is n ot 0 t he p rogram p roceeds w ith t he f ollowing instruction. operation skip if [ m]=0 affected f ag(s) none sza [m] skip i f d ata m emory i s 0 w ith data m ovement to a cc description the c ontents o f t he s pecifed d ata m emory a re c opied to t he a ccumulator. i f t he v alue i s z ero, the f ollowing instruction is s kipped. a s t his re quires t he insertion o f a d ummy instruction while t he n ext instruction is f etched, it is a t wo c ycle instruction. i f t he re sult is n ot 0 t he program p roceeds w ith t he f ollowing instruction. operation acc [ m] skip if [ m]=0 affected f ag(s) none sz [m].i skip i f b it i of d ata m emory i s 0 description if b it i o f t he sp ecifed d ata m emory is 0 , t he f ollowing instruction is s kipped. a s t his re quires the insertion o f a d ummy instruction w hile t he n ext instruction is f etched, it is a t wo c ycle instruction. i f t he re sult is n ot 0 , t he p rogram p roceeds w ith t he f ollowing instruction. operation skip if [ m].i=0 affected f ag(s) none
rev. 1.30 140 ?a??? ?? ?013 rev. 1.30 141 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu tabrd [m] read ta ble ( current p age) to t blh a nd d ata m emory description the low b yte o f t he p rogram c ode ( current p age) a ddressed b y t he t able p ointer ( tblp) is moved t o t he s pecifed d ata m emory a nd t he h igh by te mo ved t o t blh. operation [m] pr ogram c ode (low by te) tblh pr ogram c ode (high by te) affected f ag(s) none tabrdl [m] read t able (last p age) t o t blh a nd d ata m emory description the l ow by te o f t he pr ogram c ode (last p age) a ddressed by t he t able p ointer (tblp) i s mo ved to t he s pecifed d ata m emory a nd t he h igh b yte m oved to t blh. operation [m] pr ogram c ode (low by te) tblh pr ogram c ode (high by te) affected f ag(s) none xor a,[m] logical x or d ata m emory to a cc description data i n t he a ccumulator a nd t he s pecifed d ata m emory p erform a b itwise l ogical x or operation. t he re sult is s tored in t he a ccumulator. operation acc a cc x or [ m] affected f ag(s) z xorm a,[m] logical x or a cc to d ata m emory description data i n t he s pecifed d ata m emory a nd t he a ccumulator p erform a b itwise l ogical x or operation. t he re sult is s tored in t he d ata m emory. operation [m] a cc xor [ m] affected f ag(s) z xor a,x logical x or im mediate data to a cc description data i n t he a ccumulator a nd t he s pecifed im mediate data p erform a b itwise l ogical x or operation. t he re sult is s tored in t he a ccumulator. operation acc a cc x or x affected f ag(s) z
rev. 1.30 14 ? ? a ??? ?? ? 013 rev. 1.30 143 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu package information note that the package information provided here is for consultation purposes only . as this information may be updated at regular intervals users are reminded to consult the holtek website (http://www.holtek.com.tw/english/literature/package.pdf) for the latest version of the package information. 52-pin qfp (14mm14mm) outline dimensions symbol dimensions in inch min. nom. max. a 0. ? 81 0. ? 89 b 0.547 0.555 c 0. ? 81 0. ? 89 d 0.547 0.555 e 0.039 f 0.01 ? g 0.098 0.1 ?? h 0.134 i 0.004 j 0.0 ? 9 0.041 k 0.004 0.008 0 7 symbol dimensions in mm min. nom. max. a 17.30 17.50 b 13.90 14.10 c 17.30 17.50 d 13.90 14.10 e 1.00 f 0.40 g ? .50 3.10 h 3.40 i 0.10 j 0.73 1.03 k 0.10 0. ? 0 0 7
rev. 1.30 14? ?a??? ?? ?013 rev. 1.30 143 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu 64-pin lqfp (7mm7mm) outline dimensions symbol dimensions in inch min. nom. max. a 0.350 0.358 b 0. ? 7 ? 0. ? 80 c 0.350 0.358 d 0. ? 7 ? 0. ? 80 e 0.01 ? f 0.005 0.009 g 0.053 0.057 h 0.0 ? 3 i 0.00 ? 0.00 ? j 0.018 0.030 k 0.004 0.008 0 7 symbol dimensions in mm min. nom. max. a 8.90 9.10 b ? .90 7.10 c 8.90 9.10 d ? .90 7.10 e 0.40 f 0.13 0. ? 3 g 1.35 1.45 h 1. ? 0 i 0.05 0.15 j 0.45 0.75 k 0.09 0. ? 0 0 7
rev. 1.30 144 ? a ??? ?? ? 013 rev. 1.30 145 ?a??? ?? ?013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu 100-pin lqfp (14mm14mm) outline dimensions symbol dimensions in inch min. nom. max. a 0. ??? 0. ? 34 b 0.547 0.555 c 0. ??? 0. ? 34 d 0.547 0.555 e 0.0 ? 0 f 0.008 g 0.053 0.057 h 0.0 ? 3 i 0.004 j 0.018 0.030 k 0.004 0.008 0 7 symbol dimensions in mm min. nom. max. a 15.90 1 ? .10 b 13.90 14.10 c 15.90 1 ? .10 d 13.90 14.10 e 0.50 f 0. ? 0 g 1.35 1.45 h 1. ? 0 i 0.10 j 0.45 0.75 k 0.10 0. ? 0 0 7
rev. 1.30 144 ?a??? ?? ?013 rev. 1.30 145 ? a ??? ?? ? 013 HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu HT56R62/ht56r65 ht56r642/ht56r644/ht56r654/ht56r656 tinypower tm a/d type with lcd 8-bit otp mcu holtek semiconductor inc. (headquarters) no.3, creation rd. ii, science park, hsinchu, taiwan tel: 88 ? -3-5 ? 3-1999 fax: 88 ? -3-5 ? 3-1189 ? ttp://www. ? oltek. ? om.tw holtek semiconductor inc. (taipei sales offce) 4f-2, no. 3-2, yuanqu st., nankang software park, taipei 115, taiwan tel: 88 ? - ? - ?? 55-7070 fax: 88 ? - ? - ?? 55-7373 fax: 88 ? - ? - ?? 55-7383 (inte ? national sales ? otline) holtek semiconductor (china) inc. building no.10, xinzhu court, (no.1 headquarters), 4 cuizhu road, songshan lake, dongguan, china 523808 tel: 8 ? -7 ? 9- ???? -1300 fax: 8 ? -7 ? 9- ???? -1311 holtek semiconductor (usa), inc. (north america sales offce) 4 ? 7 ? 9 f ? emont blvd. ? f ? emont ? ca 94538 ? usa tel: 1-510- ? 5 ? -9880 fax: 1-510- ? 5 ? -9885 ? ttp://www. ? oltek. ? om copy ? ig ? t ? 2013 by holtek semiconductor inc. t ? e info ? mation appea ? ing in t ? is data s ? eet is believed to be a ?? u ? ate at t ? e time of publi ? ation. however, holtek assumes no responsibility arising from the use of the specifications described. the applications mentioned herein are used solely for the purpose of illustration and holtek makes no wa ?? anty o ? ? ep ? esentation t ? at su ?? appli ? ations will be suitable wit ? out fu ? t ? e ? modifi ? ation ? no ? ? e ? ommends t ? e use of its p ? odu ? ts fo ? appli ? ation t ? at may p ? esent a ? isk to ? uman life due to malfunction or otherwise. holtek's products are not authorized for use as critical components in life support devices or systems. holtek reserves the right to alter its products without prior notifcation. for t ? e most up-to-date info ? mation ? please visit ou ? web site at ? ttp://www. ? oltek. ? om.tw .

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